A test substrate and a probe card manufactured using the test substrate

Abstract

Provided are a test substrate and a probe card manufactured using the test substrate. Test-end micro bulges (2) on a top surface of the test substrate are arranged according to the layout of contacts (7) to be detected at the bottom of a wafer (10) to be detected, are correspondingly connected to through-substrate via holes (3) via top wirings (8) and are electrically conducted, the through-substrate via holes (3) are correspondingly connected to detection bulges (4) on the bottom surface of the test substrate and are electrically conducted, and the detection bulges (4) match test probes (13) in size, so that a one-to-one correspondence signal relationship between the test probes (13) and the test-end micro bulges (2) and the contacts (7) to be detected is established, and the problem that there is no way for the test probes (13) to directly detect each contact (7) to be detected due to the test probes (13) being too big and the contacts (7) to be detected being too small in the related art is solved. By overlaying an anisotropic conductive resin on the top surface of the test substrate, the test-end micro bulges (2) can be electrically conducted without the need for them to come into contact with the contacts (7) to be detected, thereby avoiding damage to the wafer (10) and improving the signal transmission property.

Description

technical field [0001] The invention relates to a test substrate and a probe card manufactured by using the test substrate, in particular to a test substrate used to detect chips in the semiconductor manufacturing industry and a probe card manufactured by using the test substrate, belonging to Electronic testing technology field. Background technique [0002] With the continuous improvement of the chip manufacturing process, the volume of the chip is continuously reduced while the operation speed is continuously improved. However, as the semiconductor manufacturing process enters the deep nanoscale, the performance of the chip can no longer continue to improve as before, mainly due to the following factors: (1) The delay on the chip interconnection has replaced the delay of the device itself, and has become an important factor for increasing the chip rate. (2) With the continuous improvement of integration, more and more devices of different processes are integrated in the ...

AI Technical Summary

Problems solved by technology

[0010] The technical problem to be solved by the present invention is that the size of the chip testing device in the prior art is too large, and the size of the TSVs on the wafer constituting the three-dimensional chip is small and the arrangement density is high, so it is impossible to detect the TSVs one by one at the same time. It is suitable for the detection of three-dimensional chip wafers before packaging, thereby providing a test substrate that can detect each through-silicon hole at the same time, suitable for the detection of three-dimensional chips before chip packaging, and the test substrate manufactured using the test substrate. probe card

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