Received signal strength indicator circuit and method for correcting deviation thereof

Abstract

The invention relates to a received signal strength indicator circuit and a method for correcting deviation thereof. The method includes a step for enabling input ends to be in short circuit: enabling the two input ends of a first-stage amplifier which is far away from a comparator to be in short circuit; a step for detecting output of the comparator: detecting whether the output of the comparator is a high level or a low level; a step for correcting the deviation: starting to correct amplifiers from the first-stage amplifier which is far away from the comparator to a last-stage amplifier which is connected with the comparator one by one. When each amplifier is corrected, the currently adjusted amplifier provides a correction voltage which is opposite to the output of the comparator, then current output of the comparator is detected, the voltage provided by the currently adjusted amplifier is blocked when the current output of the comparator is opposite to the output detected in the step for detecting the output of the comparator, and the voltage provided by the currently adjusted amplifier is maintained when the current output of the comparator is identical to the output detected in the step for detecting the output of the comparator.

Description

technical field [0001] The invention relates to a receiving signal strength indicating circuit, in particular to a receiving signal strength indicating circuit capable of correcting signal deviation and a correction method for signal deviation. Background technique [0002] A receiver signal strength indicator (received signal strength indicator, RSSI) circuit 10 such as figure 1 Shown, comprise a plurality of limiting amplifiers 11 connected in series, a plurality of limiting amplifiers 11 connected in series connects a comparator 12 to output comparison signal, the input end and the output end of each limiting amplifier 11 all connect a rectifier 13, the rectifier 13 The input AC signal can be converted into a DC signal, and all the rectifiers 13 are connected to a filter 14, and the converted DC signal is filtered by the filter 14 to output an RSSI signal. [0003] For example, the RSSI circuit 1 includes 11 stages of limiting amplifiers 11, each stage can amplify the si...

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Problems solved by technology

[0003] For example, the RSSI circuit 1 includes 11 stages of limiting amplifiers 11, each stage can amplify the signal by 6db, then the signal passing through the RSSI circuit 1 can be amplified by 66dB, so that the offset signal in the RSSI circuit 1 can be amplified many times, thereby Make the output RSSI value wrong, reduce the sensitivity of the receiver, and need to make deviation correction

[0004] One of the methods for correcting offset signals in the prior art is as figure 2 As shown, an analog deviation correction circuit 21 is connected to the input end of the RSSI circuit 10, and the deviation signal output by the comparison output end of the RSSI circuit 10 obtains the system deviation after passing through an RC filter circuit 22 to filter useful signals, and then the system The deviation is negatively fed back to the analog deviation correction circuit 21 for correction. However, since the RC filter circuit 21 filters useful signals, the required resistance and capacitance area are too large, which will slow down the startup speed and require a large chip area.

[0005] And when receiving the signal, the output of the received signal will affect the feedback of the system deviation, which will cause some deviation in the RSSI output

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