Method and device for constructing clock network

Abstract

The invention discloses a method and device for constructing a clock network. The method for constructing the clock network comprises the steps of obtaining position information of the tail end of the clock network and setting time sequence devices in a setting area. The tail end of the clock network is a wire or a point for setting the time sequence devices in the clock network. When the tail end of the clock network is the wire used for setting the time sequence devices, the tail end of the clock network is used as a symmetry axis to determine the setting area of the time sequence devices, and when the tail end of the clock network is the point used for setting the time sequence devices, the tail end of the clock network is used as a center to determine the setting area of the time sequence devices. By means of the method and device for constructing the clock network, the problem hat in the prior art, resource cost is high or design period is long when the clock network is constructed is solved, and therefore the effects of lowering resource cost for constructing the clock network and shortening constructing period are achieved.

Description

technical field [0001] The present invention relates to the field of sequential circuits, in particular to a method and device for constructing a clock network. Background technique [0002] The clock signal is used for synchronization in sequential circuit design, and uniformly commands the sequential devices in the sequential circuit (such as: flip-flops, latches, counters, shift registers, and storages, etc.) when to perform corresponding state changes. The general clock signal processing method is to transfer it from a common clock source to the clock entry point of the sequential device, and it is necessary to ensure the integrity and consistency of the clock signal during the process. In large-scale integrated circuits, due to the large number of sequential devices and the wide distribution range, a distributed clock buffer network is usually used to distribute and propagate clock signals, that is, multiple serial or parallel clock buffers are inserted in the clock pro...

AI Technical Summary

Problems solved by technology

[0008] The main purpose of the present invention is to provide a method and device for constructing a clock network, so as to solve the problem of high resource cost or long design period for constructing a clock network in the prior art

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