1T1R resistive memory device and fabrication method thereof

Abstract

A memory structure includes an active area surrounded by first isolation trenches and second isolation trenches; a bit line trench recessed into the active area of the semiconductor substrate; a word line trench recessed into the active area of the semiconductor substrate and being shallower than the bit line trench. The bit line trench and the word line trench together divide the active area into four pillar-shaped sub-regions. A bit line is embedded in the bit line trench. A word line is embedded in the word line trench. A vertical transistor is built in each of the pillar-shaped sub-regions. A resistive memory element is electrically coupled to the vertical transistor.

Description

technical field [0001] The present invention relates to the technical field of semiconductor memory, in particular to a single-transistor single-resistor (hereinafter referred to as 1T1R) resistive memory element with a vertical transistor and a buried bit line and a manufacturing method thereof. Background technique [0002] Today, the manufacturing of flash memory and DRAM memory has reached the technology node of 18 nanometers, but below 18 nanometers, it is bound to face many challenges. Therefore, various memory architectures have been proposed and researched at present, and one of the more promising ones is the so-called resistive switching random access memory or resistive memory (RRAM), which utilizes Resistive device materials operate by electronic switching (which can be current or voltage induced) between two stable resistive states. [0003] Each memory cell unit of the known resistive memory element is arranged in a columnar diode structure (diode), however, ea...

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Problems solved by technology

However, its disadvantage is that the fabrication method of resistive memory arrays accessed by field effect transistors is relatively complicated.

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