ldpc decoding method

Abstract

The invention discloses a method for decoding LDPC codes. The method for decoding the LDPC codes includes the following steps of determining a multiplexed line of a check matrix, determining a first check node calculation part, a second check node calculation part, a first variable node calculation part and a second variable node calculation part of a decoding unit, subjecting the multiplexed line to a first processing in the K times iteration processing, subjecting the first variable node calculation part to a K-1 times variable node update calculation when the first check node calculation part is subjected to a K times check node update calculation, subjecting the multiplexed line to a second processing, and subjecting the second check node calculation part to a K times check node update calculation while the second variable node calculation part is subjected to a K times variable node update calculation. Compared with the sequence of the variable node calculation and the check node calculation in the traditional method, the method for decoding the LDPC codes improves the decoding handling capacity of the LDPC codes.

Description

technical field [0001] The invention belongs to the field of LDPC decoding and relates to an LDPC decoding method. Background technique [0002] At present, in the implementation process of the LDPC (Low-Density Parity-Check) code decoding method, it is common that logic resources cannot be efficiently utilized. The traditional decoding algorithm CNU and VNU perform operations in serial order, and each part of the operation needs to wait for the results of the other part, which makes the utilization rate of CNU and VNU only 50%, which cannot be further improved, seriously affecting the translation efficiency. The speed of coding; although some methods have recently pointed out that the utilization rate of CNU and VNU has been improved by splitting the check matrix, and the utilization rate of CNU has reached 100%, but the split check matrix needs to be integrated after the CNU operation Information can be used to start the operation of VNU, so it also has a certain impact o...

AI Technical Summary

Problems solved by technology

[0002] In the implementation process of the current LDPC (Low-DensityParity-Check) code decoding method, it is common that logic resources cannot be efficiently utilized

The traditional decoding algorithm CNU and VNU perform operations in serial order, and each part of the operation needs to wait for the results of the other part, which makes the utilization rate of CNU and VNU only 50%, which cannot be further improved, seriously affecting the translation efficiency. The speed of coding; although some methods have recently pointed out that the utilization rate of CNU and VNU has been improved by splitting the check matrix, and the utilization rate of CNU has reached 100%, but the split check matrix needs to be integrated after the CNU operation Information can be used to start the operation of VNU, so it also has a certain impact on the speed; another recent implementation scheme provides a two-way input time-division multiplexing CNU and VNU implementation scheme, although this scheme makes the speed and logic unit utilization Both have been significantly improved, but the double consumption of storage resources is unbearable, especially for the CCSDS near-earth communication standard where there are two sets of 1s in each cyclic sub-matrix, and the storage resource overhead is even greater

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