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Software simulation verification method based on Cache coherence protocol

A verification method and software simulation technology, applied in the direction of functional inspection, detection of faulty computer hardware, etc., can solve problems such as the limited scale of a single-domain multiprocessor system, achieve low verification costs, accelerate system diagnosis and debugging, and quickly build Modular effect

Inactive Publication Date: 2013-01-16
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Problems solved by technology

However, due to the limitations of protocol specifications, link ports, etc., the scale of such a single-domain multiprocessor system is usually limited.

Method used

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  • Software simulation verification method based on Cache coherence protocol
  • Software simulation verification method based on Cache coherence protocol
  • Software simulation verification method based on Cache coherence protocol

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Experimental program
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Embodiment Construction

[0022] The method of the present invention is described in detail below with reference to the accompanying drawings.

[0023] We divide the verification system into figure 2 shown system simulator , Automatic Test Stimulus Generator , global inspector, The node controller simulator, in which: the system simulator is mainly used to realize the memory access operation simulation and correctness check of the target system; the test stimulus generator is mainly used to generate high-quality test stimulus; the global checker runs on the system simulator On, check the global data cache consistency and check whether the system has deadlock, starvation, etc. Discuss separately below.

[0024] system simulator, The simulator mainly includes the following parts:

[0025] Bus function model: simulation realizes the Cache, storage, and interconnection network between processors in the processor; supports custom system topology; provides transaction-level simulation support for...

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Abstract

The invention provides a software simulation verification method based on a Cache coherence protocol. According to the method, pseudo random test which is capable of compiling constraint models and also carrying out band constraint in a manual mode is subject to software simulation and verification; specific objects are verified, and the accuracy and defect of the protocols are fed back. The method based on software simulation comprises the following steps of: firstly determining a multi-stage coherence description mode based on an expanded Cache Coherence protocol; and subsequently realizing the software simulation verification method, counting the coverage rate and carrying out error report. With the adoption of the method, the Cache Coherence protocol in multi-stage domains in a multi-state space can be verified effectively so as to enable a protocol table to realize the establishment of corresponding logic relationship, judge whether the state transition of a system in accordance with the protocol table accords with the coherence definition through an overall checker, and primarily judge whether a mode established in accordance with the protocol table has expected properties. The model system has the remarkable advantages that counter-examples can be generated automatically so as to assist in debugging errors of the system and accelerating system diagnosis and debugging.

Description

technical field [0001] The invention relates to the technical field of computer applications, in particular to a software simulation verification method for a Cache consistency protocol. Background technique [0002] Cache-coherent distributed shared memory multiprocessor system is an important system structure at present. At present, the processor is directly connected to the memory and supports the Cache coherence protocol itself. Therefore, when building a multi-processor system, these processors are usually directly connected, and the consistency between the processors is maintained by their own protocol to form a single Cache coherency domain. However, due to the limitations of protocol specifications, link ports, etc., the scale of such a single-domain multiprocessor system is usually limited. In order to realize a large-scale CC-NUMA multiprocessor system, it is necessary to expand the coherence domain space with the help of the node controller NC (Node Controller)....

Claims

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Application Information

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IPC IPC(8): G06F11/26
Inventor 张峰陈继承
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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