High-voltage resistant tunneling transistor and preparation method thereof

Abstract

The invention provides a high-voltage resistant tunneling transistor and a preparation method thereof. The tunneling transistor comprises a drain, an epitaxial layer, a buried layer, a source, a gate dielectric, a grid, a source metal layer and a drain metal layer. According to the tunneling transistor disclosed by the invention, the breakdown resistance capacity of the device under a closed state can be improved, the on resistance of the device is reduced, the power consumption under a large current is reduced, the heat radiation capacity of the device is improved, and the properties of the device under the large current are optimized. According to the preparation method disclosed by the invention, the low-doped or intrinsic epitaxial layer is prepared on the drain, so that the on resistance of the device can be reduced and the power consumption under the large current is reduced; and a non-heavy doped p area is prepared near the source and a non-heavy doped n area is prepared near the drain, so that the breakdown resistance capacity of the device under the closed state can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a vertical tunneling transistor with high breakdown voltage and a preparation method thereof. Background technique [0002] For MOSFET integrated circuits, the off-state leakage current rises rapidly with the reduction of the size of the integrated circuit. In order to reduce the leakage current, thereby further reducing the power consumption of the device and improving the withstand voltage capability of the device, the tunneling transistor with a different working principle from the MOSFET is obtained a wide range of applications. At present, the conventional tunneling transistor has a planar structure, and the drain and the source are located on the same plane of the semiconductor substrate. The tunneling transistor with this structure has poor high voltage resistance, large on-resistance, and high power consumption. Moreover, the shape of the dev...

AI Technical Summary

Problems solved by technology

At present, the conventional tunneling transistor has a planar structure, and the drain and source are located on the same plane of the semiconductor substrate. The tunneling transistor with this structure has poor high voltage resistance, large on-resistance, and high power consumption.

Moreover, the shape of the device is a regular quadrilateral, and the heat dissipation area is small, which is not conducive to the dissipation of heat

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