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Quick interrupt graded processing device and method

A hierarchical processing and fast technology, applied in the field of data communication, can solve the problems of CPU response speed requirements, increased CPU occupancy, excessive time consumption, etc., to achieve fast positioning, speed up processing time, and save CPU occupancy.

Inactive Publication Date: 2012-06-13
武汉众邦领创技术有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] Most of the interruptions in these OAM processes will involve the connectivity of data services. Therefore, these interruptions must be processed and cannot be lost. Moreover, the interruption of OAM connectivity will involve the operation of protection switching of services. The speed of CPU response has time requirements
[0007] according to figure 1 In the method shown in , after the CPU receives the interrupt request, it needs to find the unit that actually generates the interrupt among the 65536 interrupt sources, which increases the overhead of the software, increases the CPU usage, and takes too much time

Method used

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  • Quick interrupt graded processing device and method

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Embodiment Construction

[0040] The present invention will be further elaborated below according to the drawings and specific embodiments.

[0041] figure 2 It is an overall structure diagram of the embodiment of the present invention, which includes: an interrupt event storage device, which is used to store the interrupt event generated by the interrupt source; an interrupt generating device, which is used to convert the interrupt event of the same interrupt source into a 1-bit interrupt flag; the interrupt flag The storage device is used for storing all generated interrupt flags; and the interrupt aggregation device is used for compressing and storing the interrupt flags in stages, and handing over the interrupt flags to the CPU for processing.

[0042] The interrupt aggregation device is composed of N levels of cascading, and the structure of each level of interrupt aggregation device is the same. Considering the bit width of CPU read and write data, all interrupts will eventually converge into a ...

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Abstract

The invention provides a quick interrupt graded processing device and a method. The quick interrupt graded processing device comprises an interrupt event memory device, an interrupt generating device, an interrupt identification memory device and an interrupt convergence device, wherein the interrupt event memory device is used for storing interrupt events generated by interrupt sources, the interrupt generating device is used for converting the interrupt events of the same interrupt source into 1 bit interrupt identification, the interrupt identification memory device is used for storing all the generated interrupt identifications, the interrupt convergence device is used for compressing the interrupt identifications in a graded manner, storing the compressed interrupt identifications and leading the compressed interrupt identifications to be processed by a CPU (central processing unit), N stages of interrupt convergence device units cascade to form the interrupt convergence device, structures of the interrupt convergence device units are identical, n represents the bit width of data read and written by the CPU, and S represents the total amount of the interrupt source of a circuit system. By the aid of the device and the method, after the CPU receives an interrupt request, only an interrupt identification needs to be searched reversely so as to find a corresponding interrupt event, the corresponding interrupt source can be quickly positioned, processing time is shortened, and the occupancy rate of the CPU is reduced.

Description

technical field [0001] The invention relates to the technical field of data communication, in particular to an interrupt processing device and method. Background technique [0002] Interruption refers to the CPU's response to a certain event that occurs in the system. The processor will temporarily stop a task that is currently being executed and temporarily save the task. Go to execute the corresponding handler for this event. After processing, return to the previously saved task to continue processing. [0003] Interrupt processing generally includes an interrupt request and an interrupt processing process. The CPU receives an interrupt request and responds to it. Events that may cause an interrupt request are called interrupt sources. After the CPU gets the interrupt request, it needs to find the corresponding interrupt source to perform corresponding processing, and the system needs to notify the CPU of the interrupt event as soon as possible to process the interrupt s...

Claims

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Application Information

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IPC IPC(8): G06F13/24G06F9/48
Inventor 傅昕林翔
Owner 武汉众邦领创技术有限公司
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