Ternary adiabatic JKL flip-flop and adiabatic novenary asynchronous counter

Abstract

The invention discloses a ternary adiabatic JKL flip-flop comprising a ternary adiabatic JKL fundamental circuit and a DTCTGAL buffer, wherein the signal input end of the ternary adiabatic JKL fundamental circuit is connected with the signal output end of the DTCTGAL buffer, the signal output end of the ternary adiabatic JKL fundamental circuit is connected with the signal input end of the DTCTGAL buffer; the complementary signal output end of the ternary adiabatic JKL fundamental circuit is connected with the complementary signal input end of the DTCTGAL buffer; both the ternary adiabatic JKL fundamental circuit and the DTCTGAL buffer are connected with a power clock signal of an amplitude level corresponding logic 1, a first clock pulse signal of an amplitude level corresponding logic 2 and a second clock pulse signal of the amplitude level corresponding logic 2; and the delay time of the DTCTGAL buffer is the same as that of the ternary adiabatic JKL fundamental circuit, and is half a clock period. The ternary adiabatic JKL flip-flop disclosed by the invention has the advantages that the circuit has very low power consumption, ternary input and output of the adiabatic circuit are realized while an energy recovery characteristic is provided, and the circuit has a higher information density and high operational reliability.

Description

technical field [0001] The invention relates to a JKL flip-flop, in particular to a three-value adiabatic JKL flip-flop and an adiabatic nine-ary asynchronous counter. Background technique [0002] With the rapid development of integrated circuits with high information density, flip-flops with memory function and capable of storing digital information, as a sequential logic circuit, are an important part of modern high-performance digital integrated circuits. Multi-valued logic circuits have the characteristics of high information density, which is of great significance for reducing the connection between circuit systems, saving chip area, improving circuit space and time utilization, and has significant advantages compared with binary logic circuits in some applications. Advantage. At present, research has been carried out on the low power consumption of multi-valued flip-flops. For example, a new type of current-mode CMOS four-valued edge flip-flop designed with current t...

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Problems solved by technology

However, since the energy in the above-mentioned circuits is consumed at one time from the power supply to the signal node and then to the ground, the power consumption is very huge, and the method of reducing power consumption using traditional CMOS circuits can save very limited energy consumption

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