DRAM (Dynamic Random Access Memory) source synchronization test method and circuit

Abstract

The invention provides a DRAM (Dynamic Random Access Memory) source synchronization test method and circuit solving the technical problems of complexity and low reliability of a test way in the prior art. The circuit is integrated in a DRAM and can precisely measure source synchronization time parameters, and whether the parameters accord with a code standard can be tested through running once. When the test circuit is activated, driving circuits and receiving circuits of a DQ (Data Strobe) base pin and a DQS (Data Strobe Signal) base pin are opened simultaneously. The test circuit comprises an adjustable delay unit, a DQS edge can be moved relative to a DQ edge, and the adjustable delay unit is arranged before the receiving circuit of the DQS base pin; the adjustable delay unit can also be placed behind the receiving circuit of the DQS base pin, and the DQ base pin receives a DQS in a delay way. By using the DRAM source synchronization test method and circuit, a source synchronization test function which can not be realized by a test machine can be restructured effectively; and the advantages of simplicity and convenience in test operation and better precision and reliability areachieved.

Description

technical field [0001] The invention relates to a DRAM source synchronous testing method and a testing circuit thereof. Background technique [0002] In the high-speed DRAM (Dynamic Random Access Memory) interface, the DQS (data strobe) signal is used together with the DQ (data) signal (every 4 or 8 DQs cooperate with 1 pair of DQS). During a read operation, DRAM generates DQS and DQ signals. The memory controller receives the DQS signal and latches the DQ with the DQS signal (this method is called source synchronous gating). In order to ensure normal work, the time relationship between DQS and DQ (parameters tDQSQ, tQH) is clearly defined. [0003] During memory production testing, these parameters must be checked and compared to product specifications. Due to reasons such as receiving signal delay, the test machine cannot use an input signal as a strobe signal to latch other received signals. Only the strobe signal based on the clock signal of the test machine can be u...

AI Technical Summary

Problems solved by technology

[0011] The present invention aims to provide a DRAM source synchronous test method and its test circuit to solve the technical problems of complex test methods and low reliability in the background technology

Images