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FPGA (Field Programmable Gate Array)-based AVS (Audio Video Standard) decoding chip verification platform device and method

A verification platform and decoding chip technology, which is applied in the fields of instruments, computing, and electrical digital data processing, etc., can solve problems such as insufficient reliability, deviation of results, and increased difficulty of decoding chip simulation, so as to improve efficiency and reliability, and reduce R&D costs , The effect of shortening the time to market

Inactive Publication Date: 2011-09-07
SHANDONG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] With the increase of the complexity of the video codec algorithm, the simulation difficulty of the decoding chip is also increasing. In this case, the traditional software simulation has more and more limitations. On the one hand, the hardware design only through software simulation It is only an ideal hardware design, and does not take into account the actual physical device characteristics, which will lead to deviations between hardware physical implementation and software simulation results; on the other hand, video decoding processing is a very complicated and time-consuming process. In the software simulation environment established on the platform, the functional verification of the hardware design takes an astonishing amount of time.
Third, for the AVS decoding SOC chip, the reliability of simply performing traditional software simulation is insufficient, and software and hardware co-verification is required

Method used

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  • FPGA (Field Programmable Gate Array)-based AVS (Audio Video Standard) decoding chip verification platform device and method
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  • FPGA (Field Programmable Gate Array)-based AVS (Audio Video Standard) decoding chip verification platform device and method

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Embodiment 1

[0031] A kind of AVS decoding chip verification platform device based on FPGA, comprise PC 15, HDTV16 and son, motherboard verification platform, it is characterized in that PC 15 is connected with son, mother board verification platform by USB interface 1 and PCI interface 6, HDTV16 Be connected with sub-board verification platform by VGA interface 9, sub-board is connected with main board through slot; Wherein sub-board comprises FPGA18 and JTAG interface, and main board comprises (FPGA2) 7, USB interface 1, PCI interface 6, VGA interface 9, SRAM3, SDRAM4, DDR13, FLASH5, (FIFO1) 11, (FIFO2) 12 and clock unit 10, power supply 14 and FPGA configuration reset part 2;

[0032] Wherein the connection relation of each part in sub-board verification platform is as follows: (FPGA2) 7 is connected on the USB (universal serial bus) interface 1 by its own IO interface, and by USB line and the USB interface 1 on the PC 15 Link to each other; (FPGA2) 7 is connected on the PCI interface 6...

Embodiment 2

[0034] A kind of method using above-mentioned device to carry out software and hardware co-verification to AVS decoding chip, the steps are as follows:

[0035] 1) Verify that the platform is powered on and reset, and the FPGA configuration reset part downloads the controllers of FIFO1, FIFO2, DDR memory, and the interface controllers of USB interface, PCI interface, and VGA interface to FPGA2 and performs initialization settings;

[0036] 2) Download the AVS decoder hardware module, that is, the PC downloads the code of the AVS decoder hardware module to FPGA1 through the JTAG interface on the daughter board. In terms of external functions, FPGA1 plays the function of the decoder hardware module, which can be downloaded on the PC The corresponding decoding function is completed under the control of the controller, and the SDRAM controller and the FLASH controller will also be downloaded to FPGA1 together;

[0037] 3) Embedded high-level semi-decoding, that is, to simulate and...

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Abstract

The invention relates to an FPGA (Field Programmable Gate Array)-based AVS (Audio Video Standard) decoding chip verification platform device and method, belonging to the field of simulation verification of integrated circuits. The device comprises a PC (Personal Computer), an HDTV (High-Definition Television) and a primary and secondary board verification platform, wherein the PC is connected with the primary and secondary board verification platform through an USB (Universal Serial Bus) interface and a PCI (Programmable Communication Interface), the HDTV is connected with the primary and secondary board verification platform through a VGA (Video Graphics Array) interface, and a secondary board is connected with a primary board through a slot. The method comprises the following steps of: electrifying and resetting; downloading an AVS decoder hardware module; carrying out embedded high-level semi-decoding; inputting a semi-decoded code stream; decoding by the AVS decoder hardware module; looping back a decoded code stream; checking whether a result is correct or not; revising a design; downloading the whole design; inputting an AVS code stream; decoding by an AVS decoder, and carrying out format conversion; and displaying by the HDTV. By means of the invention, the simulation efficiency and the simulation reliability are increased, the time to the market for the products is shortened, and the chip development cost is lowered; and when chips are tested after photoetching is completed, the AVS decoding chip verification platform device has favorable reusability.

Description

technical field [0001] The invention relates to an FPGA-based AVS decoding chip verification platform device and method, belonging to the field of simulation verification of integrated circuits. Background technique [0002] With the rapid development of large-scale integrated circuit technology and mobile communication industry and the popularization of smart phones, various data services based on smart phones are also developing in full swing, streaming media, PTT, videophone, mobile TV and other services are becoming more and more popular. It can be foreseen that the audio and video services based on mobile smart terminals will grow rapidly in the future, and there is great room for development. [0003] AVS is the abbreviation of the "Advanced Audio and Video Coding for Information Technology" series of standards, and its second part, the video coding standard, is mainly used for compression processing of high-density and high-quality video images. The AVS standard is t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 王祖强董红蕾王照君徐辉邱晓光
Owner SHANDONG UNIV
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