Shift register circuit, display device and shift register circuit driving method

Abstract

A control part (1) generates a control signal, which puts a first switching element (T6) in a conducting state, from the non-active electric potential level of a charging node (netA) at a charging node (netA) and the active electric potential level of a second clock signal in an active period of a second clock signal, and outputs to a control terminal (netB) for conduction and blocking of the first switching element (T6).

Description

technical field [0001] The present invention relates to a shift register circuit made monolithically in a display panel. Background technique [0002] In recent years, gate monolithic circuits have been developed in which costs are reduced by forming gate drivers on liquid crystal panels using amorphous silicon. The gate monolithic circuit is also called no gate driver, panel built-in gate driver, panel inner gate (gate in panel), etc. [0003] Figure 12 A configuration example of a shift register circuit constituting a gate driver formed by a gate monolithic circuit is shown. [0004] In this shift register circuit, each stage (shift register stage) SRk (k is a natural number) has: a set terminal SET, an output terminal GOUT, a reset terminal RESET, a low-level power supply input terminal VSS and a clock input terminal CKA, CKB. In each stage of SRk (k≧2), the output signal GOUT of the preceding stage SRk-1 is input to the set terminal SET (substituted by an output term...

AI Technical Summary

Problems solved by technology

As a result, the transistor T5 is turned on, and the clock signal input from the clock input terminal CKA appears at the source of the transistor T5, but at the moment when the clock pulse (high level) is input to the clock input terminal CKA, the self-discharge of the capacitor C1 is used. The boost effect makes the potential of the node netA overshoot, so the transistor T5 will get a large overvoltage

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