Digital phase-locked loop based on Cordic algorithm

Abstract

The invention discloses a digital phase-locked loop based on a Cordic algorithm, comprising: a controller for implementing a phase-locked loop algorithm for outputting a sinusoidal signal; the controller comprises: a frequency measuring module for performing segmental frequency measurement on a reference clock input signal; a phase and frequency discriminator for comparing the reference clock input signal with a feedback signal; a digital filter for equalizing an output signal of the phase and frequency discriminator; and an oscillator for receiving frequency measurement result from the frequency measuring module, generating an output signal having same frequency as the reference clock input signal, and receiving and adjusting phase of the output signal of the digital filter to be synchronous to the reference clock input signal; and a sine wave shaping module which is located at a feedback loop and used for converting the sinusoidal signal into a square signal. Compared with the priorart, the digital phase-locked loop based on the Cordic algorithm outputs a digital sinusoidal signal synchronous to a reference clock signal, and the digital sinusoidal signal is convenient for use in digital signal processing.

Description

technical field [0001] The invention relates to a digital phase-locked loop, in particular to a digital phase-locked loop outputting sinusoidal signals. Background technique [0002] Phase-locked loop (Phase-locked Loop, PLL) is a frequency and phase synchronization technology realized by the principle of feedback control, and its function is to keep the output clock of the circuit synchronized with its external reference clock. When the reference clock frequency or phase changes, the phase-locked loop can detect this change, and adjust the output frequency through the voltage-controlled oscillator until the two are resynchronized. PLL technology is widely used in communication, navigation, radio and television communication, instrument measurement, digital signal processing and national defense technology. [0003] Phase-locked loops can be divided into analog phase-locked loops and digital phase-locked loops. Relatively speaking, digital phase-locked loops have many advan...

AI Technical Summary

Problems solved by technology

But this method has two defects: one is that the converted sinusoidal signal cannot enter the feedback loop, and the signal is unstable; the other is that the digital signal is not a continuous signal, so there is a gap between the generated digital sinusoidal signal and the square wave signal. The phase error is large

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