Manufacturing method of power semiconductor device
A technology of power semiconductors and manufacturing methods, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., to reduce lateral resistance, suppress latch-up effects, and achieve good results
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[0028] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0029] In the embodiment of the present invention, the middle part of the well region formed on the semiconductor layer is hollowed out, and an electrode contact layer flush with the surface of the semiconductor layer is filled therein, and there is a laterally diffused source region on the side of the electrode contact layer, so the size of the source region It is completely determined by the width of its lateral diffusion, that is, the lateral size of the source region of the device can be minimized.
[0030] The power semiconductor device provided by the first embodiment of the present invention...
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