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High-speed radix-16 Montgomery modular multiplier VLSI (very large scale integrated circuit)

A modular multiplier, high-speed technology, applied in the field of high-speed Montgomery modular multiplier VLSI, can solve the problems of increased memory overhead, unreasonable base, low average performance, etc., to overcome low average performance, save storage overhead, average high performance effect

Inactive Publication Date: 2011-03-16
WUXI GAOZHEN S&T
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Firstly, the basis used is not reasonable enough; secondly, the structure of the MM Cell operation unit has not been optimized. figure 2 It can be found in the critical path ( figure 2 Indicated by a longer thick black line) is still very long, and the hardware overhead is relatively large; finally, in the FIFO design, in order to store temporary data SS’ and SC’, two storage units (such as figure 1 ), increasing memory overhead
[0051] To sum up, in the process of realizing the present invention, the inventor found that there are at least defects such as low average performance, low clock frequency, large hardware overhead and poor practicability in the prior art

Method used

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  • High-speed radix-16 Montgomery modular multiplier VLSI (very large scale integrated circuit)
  • High-speed radix-16 Montgomery modular multiplier VLSI (very large scale integrated circuit)
  • High-speed radix-16 Montgomery modular multiplier VLSI (very large scale integrated circuit)

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Embodiment Construction

[0068] The preferred embodiments of the present invention will be described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

[0069] According to an embodiment of the present invention, a radix-16 high-speed Montgomery modular multiplier VLSI is provided. like Figure 3-Figure 6b As shown, the present embodiment includes N MM Cell computing units, FIFO storage units, and a 2-to-1 data selection unit, wherein: in the N MM Cell computing units, the multiplier input terminal of each MM Cell computing unit is connected to Multiplier X (i) Connection, the control signal input terminal of the first MM Cell operation unit is connected to the control signal, the multiplicand input terminal is connected to the multiplicand Y (i) Connections, modulo inputs and modulo M (i) Connection, N MM Cell c...

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Abstract

The invention discloses a high-speed radix-16 Montgomery modular multiplier VLSI (very large scale integrated circuit) which comprises N-numbered MMCell arithmetic elements, an FIFO (first in first out) storage unit and an alternative data selection unit. The high-speed radix-16 Montgomery modular multiplier VLSI overcomes the defects of low average behavior, low clock frequency, large hardware expenditure, poor practicability and the like in the prior art, thus achieving the advantages of high average behavior, high clock frequency, small hardware expenditure and good practicability.

Description

technical field [0001] This invention relates to electronic circuits and, in particular, to radix-16 high speed Montgomery modular multipliers very large scale integration (VLSI). Background technique [0002] At present, the rapid development of the Internet makes information security technology particularly important, such as online shopping, online banking, data downloading, etc., all need an identity authentication system. In modern cryptography, public key cryptosystem is used to accomplish this task, which can provide a series of security guarantees such as digital signature, identity authentication, data integrity and non-repudiation. [0003] In the public key cryptosystem, the most widely used is the RSA cryptographic algorithm (RSA cryptographic algorithm is an asymmetric cryptographic algorithm). The RSA encryption algorithm is simple and effective, but it is very time-consuming, because the basic operation of RSA is exponentiation operation, and its operand leng...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/72
Inventor 范益波袁帅方井霞
Owner WUXI GAOZHEN S&T
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