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H.264 high-speed luminance interpolating device and method

A luminance interpolation and high-speed technology, applied in television, electrical components, digital video signal modification, etc., can solve problems such as high parallel flow without considering the architecture

Inactive Publication Date: 2010-08-04
HANGZHOU SILAN MICROELECTRONICS
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Problems solved by technology

[0028] At present, the existing H.264 luminance interpolation processing design mainly takes the interpolation process of a single pixel as the starting point, and optimizes the internal interpolation algorithm to reduce the cost of the chip area, but does not consider the high parallel pipeline in the architecture to meet the increasing demands. Fast codec processing speed requirements

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  • H.264 high-speed luminance interpolating device and method
  • H.264 high-speed luminance interpolating device and method
  • H.264 high-speed luminance interpolating device and method

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Embodiment Construction

[0087] The present invention will be further described below in conjunction with the accompanying drawings. In this embodiment, the H.264 high-speed luminance interpolation device and method are described by taking a 4-way 6-tap filter as an example.

[0088] H.264 high-speed brightness interpolation device, such as figure 2As shown, it includes a reference buffer module (21), a register input control module (22), a register bank (23), a filter input control module (24), a 4-way 6-tap filter (25, 26, 27, 28), RAM cache I / O control module (30), RAM cache module (29):

[0089] The reference buffer module (21) reads and saves the reference pixel matrix required by the current luminance block interpolation processing from the outside in DMA mode;

[0090] The current luminance block is composed of 4×4 integer pixels, and the reference pixel matrix is ​​based on the corresponding position of the current 4×4 luminance block in the reference image, with two rows of pixels on the to...

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Abstract

The invention provides an H.264 high-speed luminance interpolating device comprising a reference caching module, a register input control module, a register set, a filter input control module, N paths of six-tap filters, an RAM (Random-Access Memory) caching I / O control module and an RAM caching module. The reference caching module reads reference pixel matrixes required for the interpolation of the current luminance block from the outside, the reference pixel matrixes are put in the register set after fully being read in the reference caching module, the N paths of six-tap filters simultaneously and respectively obtain six reference pixels as inputs from the register set through the filter input control module, and 1 / 2 pixel points are acquired and then are cached in the RAM caching module. The whole interpolating process of the device achieves a saturated state through the steam running of multiple parallel filters so that the device effectively reduces the luminance interpolating clock number, improves maximum calculating frequency and satisfies the demands of the real-time encoding and decoding of multiple high-definition digital video signals.

Description

technical field [0001] The invention relates to the luminance interpolation technology in the H.264 digital video codec standard, in particular to the H.264 high-speed luminance interpolation device and method realized by parallel pipeline, which can be applied to H.264 encoding and decoding. Background technique [0002] The H.264 / AVC standard formulated by the joint video group composed of the International Telecommunication Union and the ISO Moving Picture Experts Group is an efficient second-generation video coding standard, which has been widely used in security monitoring, videophone, video Conference, DVD, digital terrestrial TV, satellite TV, terminal digital video, digital video camera, mobile multimedia and other fields. Object motion is continuous, while digital video sequences are discrete sampling signals. In order to obtain better coding performance, the H.264 standard uses the brightness interpolation technology with the highest precision of 1 / 4 pixel in motio...

Claims

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Application Information

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IPC IPC(8): H04N7/26H04N7/50H04N19/186H04N19/436H04N19/80
Inventor 徐向阳汤博
Owner HANGZHOU SILAN MICROELECTRONICS
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