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Inbuilt miicromicro farad stage capacitance intermittent microcurrent second-level time delay circuit

A time delay circuit and capacitor charging technology, applied in the field of microelectronics, can solve the problems of built-in difficulties and large integrated circuit chip area, and achieve the effect of increasing charging time, reducing capacitance value, reducing chip area and cost

Active Publication Date: 2010-06-30
海安江理工技术转移中心有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These two methods occupy a large area of ​​the integrated circuit chip, so it is difficult to build

Method used

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  • Inbuilt miicromicro farad stage capacitance intermittent microcurrent second-level time delay circuit
  • Inbuilt miicromicro farad stage capacitance intermittent microcurrent second-level time delay circuit
  • Inbuilt miicromicro farad stage capacitance intermittent microcurrent second-level time delay circuit

Examples

Experimental program
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Effect test

Embodiment Construction

[0018] see figure 1 , The circuit of the present invention includes a mirror current source 1 , a switch tube 2 , a capacitor charging circuit 3 , a narrow pulse generating circuit 4 and an output circuit 5 . The output terminal of mirror current source 1 V a It is connected with an input terminal of the switch tube 2; the output terminal V of the narrow pulse forming circuit 4 c Connect with the other input terminal of switch tube 2; output terminal V of switch tube 2 b Connected with the input terminal of the capacitor charging circuit; the output terminal V of the capacitor charging circuit 3 d Connect with the input terminal of output circuit 5; the output terminal V of output circuit 5 o Connect to the subsequent signal processing circuit.

[0019] see figure 2 , the mirror current source 1 provides an accurate tiny current value by changing the ratio of the width-to-length ratio of its internal mirror transistor, using a mirror current source to provide a small cur...

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PUM

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Abstract

The invention discloses an inbuilt miicromicro farad stage capacitance intermittent microcurrent second-level time delay circuit, which is provided with a mirror image current source, a switching tube, a capacitance charging circuit, a burst pulse generating circuit and an output circuit, wherein the output end of the mirror image current source and the output end of the burst pulse generating circuit are respectively connected with two input ends of the switching tube; the output end of the switching tube is connected with the input end of the capacitance charging circuit; the output end of the capacitance charging circuit is connected with the input end of the output circuit; and the output end of the output circuit is connected with a subsequent signal processing circuit. When a mirror image source produces microcurrent to charge the capacitance by the switching tube, a burst pulse signal controls the switching on and off of the switching tube to realize the intermittent charging to the capacitance by the microcurrent so as to prolong charging time and reduce inbuilt capacitance value in an integrated circuit; when the capacitance charging circuit outputs the voltage value which reaches the preset value, the output circuit converts an analog signal into a digital signal to be provided for the subsequent signal processing circuit.

Description

technical field [0001] The invention relates to a time delay circuit inside an integrated circuit, in particular to an intermittent micro-current second-level time delay circuit with a built-in picofarad capacitor, which belongs to the technical field of microelectronics. Background technique [0002] In circuit design, a delay circuit is usually required to allow the signal to change from one state to another state (on or off) after a certain period. The traditional time delay circuit is usually implemented by a digital clock circuit and a frequency divider; or an external capacitor is charged and discharged to provide a time delay. The capacitor is in microfarads, and the resistance needs to be more than 500 kΩ to obtain a second-level time delay. These two methods occupy a large area of ​​the integrated circuit chip, so it is difficult to build them. Contents of the invention [0003] The purpose of the present invention is to overcome the deficiencies of the prior art...

Claims

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Application Information

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IPC IPC(8): H03K17/288
Inventor 夏晓娟杨淼孙大有孙伟锋陆生礼时龙兴
Owner 海安江理工技术转移中心有限公司
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