Lateral diffused metal oxide semiconductor transistor structure capable of avoiding double-hump effect

Abstract

The invention provides a lateral diffused metal oxide semiconductor transistor structure which comprises a substrate layer, an oxidation layer and a polysilicon layer which are distributed from bottom to top, wherein the polysilicon layer is used as a gate electrode of the LDNMOS; two N type drift regions are respectively positioned at two sides of the oxidation layer in the substrate layer for being used as a source electrode and a drain electrode of the LDNMOS; a P type drift region is annularly arranged outside the gate electrode, the source electrode and the drain electrode of the LDNMOS in the substrate layer for being used as a base electrode of the LDNMOS; and the distance between each of the edges at the other two sides of the oxidation layer and the edge of the P type drift region is 0-0.2mu m. The LDNMOS structure provided by the invention enables the thinner part in the gate oxide (GOX) of the LDNMOS to be positioned outside the N type drift regions and beyond the effectivesize range of the device, and the effective gate oxide thickness is kept uniform to prevent the MOS from being opened at lower subthreshold voltage caused by the thinner gate oxide, thereby limiting the double-hump effect of the LDNMOS.

Description

technical field [0001] The invention relates to a structure of a laterally diffused metal oxide semiconductor transistor, and further relates to a structure of a laterally diffused metal oxide semiconductor transistor which avoids the double peak effect. Background technique [0002] Laterally Diffused N type Metal Oxidesemiconductor (LDNMOS) plays an important role in the design and manufacture of several circuits. For example, a laterally diffused metal oxide semiconductor transistor (HV LDNMOS) is widely used in a driver chip of a thin film transistor liquid crystal display. [0003] The structure diagram of the current LDNMOS is as follows figure 1 and figure 2 as shown, figure 1 is a schematic top view of a known LDNMOS structure; figure 2 for figure 1 Schematic diagram of the cross-section of the LDNMOS along the x direction; image 3 for figure 1 Schematic diagram of the cross-section of the LDNMOS along the y direction. The LDNMOS includes a base layer B, a...

AI Technical Summary

Problems solved by technology

[0006] In the above mechanism, the thinner part of the oxide layer GOX is the effective conductive part, and because this part of the oxide layer GOX is relatively thin, it can withstand a lower turn-on voltage, which in turn causes the LDNMOS to have a lower turn-on voltage. This turn-on The voltage is lower than the normal turn-on voltage of the transistor, thus forming two bumps on the Id-Vg curve of the transistor (such as Figure 4 Shown by the dotted line curve), that is, the transistor has a double-peak effect. Its performance is that in the subcritical region (B-threshold), when the MOS is not turned on (Vg<Vt), the transistor has obvious leakage (I-leakage )

The early appearance of this leakage will directly lead to the failure of the transistor and the low yield of the product

Images