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Mutual exclusion and semaphore cell block of multi-core processor satisfying SystemC syntax

A multi-core processor and semaphore technology, applied in the architecture with multiple processing units, electrical digital data processing, special data processing applications, etc., can solve problems such as powerlessness

Active Publication Date: 2010-01-27
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But for complex mutexes and semaphores and for specific syntax processing, there is generally nothing you can do

Method used

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  • Mutual exclusion and semaphore cell block of multi-core processor satisfying SystemC syntax
  • Mutual exclusion and semaphore cell block of multi-core processor satisfying SystemC syntax
  • Mutual exclusion and semaphore cell block of multi-core processor satisfying SystemC syntax

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Embodiment Construction

[0041] A multi-core processor meeting the syntax requirements of SystemC provided by the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0042] Multi-core processors optimized for SystemC hope to adopt SystemC as a multi-core software development language. SystemC is an extended library of C++. In 1999, companies such as Cadence, Synopsys, and ARM in the EDA industry jointly organized the development of a C++-based EDA language, thus giving birth to SystemC. In 2006, SystemC officially became the IEEE standard, becoming the third natural language after VHDL and Verilog supported by all EDA software.

[0043] SystemC can provide higher design efficiency and a more effective design process, which can help solve the explosive complexity, market pressure, cost rise and other problems faced by the integrated circuit industry.

[0044] The SystemC language itself is an extension of C++. Therefore, althoug...

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Abstract

The invention discloses a mutual exclusion and semaphore cell block of a multi-core processor satisfying SystemC syntax, which comprises a logic circuit achieved according to the function codes of sc_mutex (name), sc_mutex.lock(), sc_mutex.trylock(), sc_mutex.unlock(), sc_semaphore.wait(), sc_semaphore.trywait(), sc_semaphore.post(), sc_semaphore(init_value), sc_semaphore(name, init_value) of the SystemC syntax, wherein the logic circuit is used for sending signals for activating and pausing the processor to a controller at runtime of the processor cores, and allows a mapping algorithm of a software development tool to recombine a plurality of mutual exclusion and semaphore cells positioned at different processing units so as to finish the functions of an sc_mutex or sc_semaphore syntax unit defined by a SystemC language. By applying the mutual exclusion and semaphore cell block, local resources can be applied to the resource sharing and the synchronization between any plurality of processing units and between the processing unites and peripherals.

Description

technical field [0001] The invention relates to a multi-core processor, more specifically, the invention relates to a mutual exclusion and semaphore unit group of a multi-core processor meeting the syntax requirements of SystemC. Background technique [0002] In recent years, multi-core processor technology has been booming. The main reasons are as follows: first, design requirements; the cost of silicon is getting lower and lower, and the integration level is getting higher and higher, and the regular structure of multi-core can use more silicon area simply and effectively; second, business Requirements: Multimedia services are becoming more and more complex, requiring platform flexibility and processing performance to be higher and higher, while also requiring power consumption to be kept within the allowable range. Multi-core processors can potentially provide the highest performance-to-power ratio and are available for higher Performance calculation and flexibility; thi...

Claims

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Application Information

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IPC IPC(8): G06F17/50G06F15/80G06F15/163G06F9/52
Inventor 陈曦黄毅刘祥张金龙任菲
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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