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Encoding and decoding of low density parity check (LDPC) codes

A low-density parity, LDPC code technology, applied in error detection coding, coding, coding components using multi-bit parity bits, etc., can solve problems such as inaccurate connections

Inactive Publication Date: 2010-01-20
QUALCOMM INC
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

The encoding process also partially operates along the edges of the graph, but the connections are not accurate enough

Method used

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  • Encoding and decoding of low density parity check (LDPC) codes
  • Encoding and decoding of low density parity check (LDPC) codes
  • Encoding and decoding of low density parity check (LDPC) codes

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Embodiment Construction

[0053] In the following description, numerous specific details are given in order to provide a thorough understanding of the embodiments. However, one of ordinary skill in the art would understand that the described embodiments may be practiced without these specific details. For example, circuits may be shown in block diagram form in order not to obscure the embodiments in unnecessary detail. In other instances, well-known circuits, structures and techniques may be shown in detail in order not to obscure the embodiments.

[0054] Also, it is to be noted that the embodiments are described as processes, and the processes are described as flowcharts, flowchart diagrams, block diagrams, or block diagrams. Although a flowchart may describe the operations as a sequential process, many of the operations may be performed in parallel or simultaneously. Additionally, the order of the operations may be rearranged. A process terminates when its operations are complete. A procedure ma...

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Abstract

A novel apparatus and method for encoding data using a low density parity check (LDPC) code capable of representation by a bipartite graph are provided. To encode the data, an accumulate chain of a plurality of low degree variable nodes is generated. The accumulate chain is closed to form a loop twice, once using a low degree variable nodes such as a degree two node and once using a higher degree variable node such as a degree three node which is higher than the low degree variable node, where the higher degree variable node comprises a non-loop-closing edge. In one embodiment, the plurality of low degree variable nodes may have the same permutation on each edge, where permutations are used for lifting a small size base graph into the graph of the LDPC code.

Description

[0001] Claiming Priority Based on 35 U.S.C. §119 [0002] This patent application claims priority to U.S. Provisional Application No. 60 / 894,183, filed March 9, 2007, entitled "Methods and Apparatus for Encoding and Decoding LDPC Codes," which is assigned to the assignee of this application, It is hereby expressly incorporated by reference. technical field [0003] The present application is directed to methods and apparatus for encoding and decoding data for the purpose of detecting and / or correcting errors in binary data, e.g. check code. Background technique [0004] Error correcting codes are ubiquitous in communication and data storage systems. In recent years, there has been considerable interest in a class of codes known as low density parity check (LDPC) codes. [0005] LDPC codes are usually represented by a bipartite graph called a Tanner graph, in which a set of nodes, i.e., variable nodes, correspond to bits of a codeword, while another A group node, ie a con...

Claims

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Application Information

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IPC IPC(8): H03M13/11
CPCH03M13/1185H03M13/6561H03M13/116H03M13/1188H03M13/11
Inventor T·理查森N·布尚A·汉德卡尔
Owner QUALCOMM INC
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