Wireless receiver and method for eliminating DC offset of wireless receiver

Abstract

The invention discloses a wireless receiver and a method for eliminating the DC offset in the wireless receiver. The wireless receiver comprises a buffer module, a comparison module and a control module, wherein the buffer module is a part of the circuit of the wireless receiver and is used for receiving the outputs IN plus and IN minus from a prior programmable gain amplifier and outputting VI plus and VI minus to the input of the ADC in a baseband processing chip after buffing treatment and voltage division by a variable-load resistor; the comparison module is specifically used for calibration and is used for comparing the difference of the received outputs VI plus and VI minus from the buffer module, outputting the high electrical level when the VI plus is larger than the VI plus and outputting the low electrical level when the VI plus is smaller than the VI minus; and the control module regulates the resistance of the variable-load resistor in the buffer module according to the output level from the comparison module, so as to reduce the difference in DC common-mode voltage between the output VI plus and the output VI minus from the buffer module.

Description

technical field [0001] The invention relates to wireless receiver technology, in particular to a wireless receiver and a method for eliminating DC imbalance in the wireless receiver. Background technique [0002] In a zero-IF receiver, since the useful frequency band contains zero frequency, the DC offset of the analog baseband differential output DC common-mode voltage will damage the useful signal, and may saturate the subsequent circuit, affecting the processing of the signal by the subsequent circuit . This requires offset cancellation before the analog baseband output. [0003] DC offset is caused by device mismatch and process variation. For example, a lot of resistors are used in the PGA (Programmable Gain Amplifier) ​​in the receiver. Since it is difficult to make these resistors completely symmetrical in the layout design, there will be an offset, and the gain of the PGA will amplify this offset. A relatively large DC offset is generated at the output. [0004] ...

AI Technical Summary

Problems solved by technology

The disadvantage of using a high-pass filter is that it destroys the useful signal near zero frequency; and directly using a programmable current source or current sink to compensate the signal path may cause nonlinear distortion and damage the useful signal.

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