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Convolution interleaving/de-interleaving method in digital transmission

A technology of convolution interleaving and digital transmission, which is applied in the field of digital signal transmission and can solve problems such as complex control

Inactive Publication Date: 2009-04-08
BEIJING BM ELECTRONICS HIGH TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This method adopts RAM to realize convolution interleaving, has saved resources, and total scale is reduced, but this method still needs to be used for storing the FIFO of offset address in each district, capacity is (I-1) unit, and the control of this method is more complicated

Method used

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  • Convolution interleaving/de-interleaving method in digital transmission
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  • Convolution interleaving/de-interleaving method in digital transmission

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Embodiment Construction

[0056] In this embodiment, 12 is selected for I, and 17 is selected for M. During interleaving, RAM space N=I(I+1)M / 2 is occupied, that is, 1326 spaces are occupied, and a round of read-write operations are performed on the RAM. The address for reading and writing is generated by the address generator, such as Figure 7 As shown, each address in each round differs by 17, 34, ... 287, 204.

[0057] This interleaver is composed of 12 branches, from 0 to 11, assuming that the current interleaved read and write data is participating in the i-th delay branch, and the corresponding RAM read and write address is A n , then the address of the next interleaved read and write data corresponds to the i+1th delay branch, and the corresponding read and write address is A n+1 , then there are:

[0058] A n+1 =A n +17(i+1) when i! =11,A n +17(i+1)<1326;

[0059] A n+1 =A n +17(i+1)-1326 when i! =11,A n +17(i+1)≥1326;

[0060] A n+1 =A n +12×17+1 When i=11, A n +12×17+1<1326; ...

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Abstract

The invention discloses a method for interleaving and deinterleaving a convolution in digital transmission. The method regards an RAM as a ring with end-to-end addresses, and occupies RAM I(I+1)M / 2 space while interleaving according to the I and M information. While interleaving, the RAM is subject to writing-after-reading operations round by round. Differences among various addresses that are read and written in each round are M, 2M, to IM, and the address of the next round is close to that of the prior round. RAM I(I+3)M / 2 space is occupied while deinterleaving, and reading-reading-writing operations are performed round by round. Differences among various addresses that are read for the first time in each round are (I+1)M, IM, to 2M, and the address of the next round is close to that of the prior round. The address that is read for the second time and the address that is read for the first time are separated by 2M+1 space, namely having a distance of the 2M (shown as in the figure). The written address is the same as the address that is read for the first time. The convolution process is simply controlled, and a deinterleaver and an RS decoder can share an RAM, which saves the resources.

Description

technical field [0001] The invention belongs to the field of digital signal transmission, in particular to a method for realizing convolutional byte interleaving of transmission data in digital television broadcast transmission. Background technique [0002] In modern digital communication systems, transmission channels are often affected by various interferences and attenuations, so errors in transmitted signals may occur. To this end, channel coding and interleaving are generally used to improve system performance. Channel coding often uses a forward error correction code (FEC, Forward Error Correction) as an outer code, and uses an interleaving code as an inner code. For random errors, it can generally be corrected by channel error correction coding, but for burst errors, interleaving technology must be added. That is, at the transmitting end, the order of the data to be transmitted is disrupted through interleaving, and then at the receiving end, the original order of ...

Claims

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Application Information

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IPC IPC(8): H04L1/00H03M13/27
Inventor 李占才刘长成
Owner BEIJING BM ELECTRONICS HIGH TECH
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