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A multi-processor video coding chip device and method

A video encoding and multi-processor technology, applied in digital video signal modification, TV, electrical components, etc., can solve problems such as increased chip power consumption, increased chip cost, and sharp increase in chip transistor size, so as to reduce power consumption and reduce idle time. the effect of time

Active Publication Date: 2008-09-17
INST OF COMPUTING TECH CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In a single-core processor, improving performance is mainly achieved by increasing the frequency and increasing the cache. The former will lead to an increase in chip power consumption, while the latter will increase the size of chip transistors, resulting in a substantial increase in chip costs.
Although costly, both measures yield only small performance gains

Method used

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  • A multi-processor video coding chip device and method
  • A multi-processor video coding chip device and method
  • A multi-processor video coding chip device and method

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Embodiment Construction

[0039] In order to make the purpose, technical solution and advantages of the present invention clearer, a multi-processor video encoding chip device and method of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0040] like figure 1As shown, the multi-processor video coding chip device of the present invention includes a multi-core encoder 3 with a plurality of processors 31, an image slice (Slice) unit 1, and a frequency control unit 2, wherein:

[0041] The image slicing unit 1 is used for dividing a video image into a plurality of slices (Slices), and assigning each slice to different processors 31 of the multi-core encoder 3 for processing.

[0042] For the multiprocessor encoder processing of the present invention, the encoding is firstly di...

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Abstract

The invention discloses a device and a method for a multiprocessor video coding chip. The device comprises a multi-core coder including multiple processors, and an image slice unit. The image slice unit is used for segmenting a video image into multiple slices, and distributing the slices to different processors of the multi-core coder; the multi-core coder is used for imaging coding by means of parallel pipeline when processing the image slices by multiple processors, and sending a massage to the image slice unit after a processor of the multi-core coder finishes processing one slice, such that the image slice unit sends a next slice to the processor. The device also comprises a frequency control unit for adjusting the processing speeds of the processors of the multi-core coder by using dynamic frequency adjusting method. The invention can greatly reduce power consumption without affecting the running speed of a whole task.

Description

technical field [0001] The invention relates to the technical field of digital video signal processing, in particular to a multi-processor video encoding chip device and method. Background technique [0002] While transistor budgets continued to increase and microprocessor design techniques continued to improve, the ability to clock a chip while keeping heat dissipation within reasonable limits began to hit a snag a few years ago. Washington-based Digital Power Group energy research firm estimates that today's computers consume about 10% of the total electricity generated in the United States, and this figure will double by 2015, so the United States is considering legislation to force companies and technology to provide reduce energy consumption. [0003] And by switching to a multi-core design within a single chip, processing manufacturers can reduce or maintain clock rates while controlling dissipated heat, doubling the number of processing engines available in the same ...

Claims

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Application Information

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IPC IPC(8): H04N7/26H04N7/50H04N19/174H04N19/436
Inventor 纪雯陈益强
Owner INST OF COMPUTING TECH CHINESE ACAD OF SCI
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