A novel measuring device for error code rate
A measurement device and a technology for bit error rate, which are applied in error detection/prevention, digital transmission systems, electrical components, etc. using signal quality detectors, which can solve the problems of cumbersome operation and waste of hardware resources, and achieve the purpose of avoiding cumbersome and saving hardware. The effect of cost, good scalability and flexibility
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[0040] figure 2 In the illustrated embodiment, the programmable processing device is implemented using a computer 18; the user control software ( Figure 6 Its process shown) is installed in the computer 18, and this software contains the channel parameter of configuration channel simulation unit, bit error calculation processing (including generating bit error test data, receiving the data transmitted through the channel, bit error calculation), and other related At the same time, an executable program named data2mem and the initial bit configuration file of FPGA are also configured in the computer 18.
[0041] The signal processing hardware platform consists of an input analog bandpass filter 11, an input mixer 12, an input analog low-pass filter 13, a variable gain operational amplifier 14, an AD9254 analog-to-digital converter 15, a channel analog FPGA chip 16, and a CPLD control module 17. Computer 18, PCI9054 interface chip 19, AD9744 digital-to-analog converter 20, ou...
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