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Apparatus and method for handling interrupt disabled section and page pinning apparatus and method

A page-fixing, device-based technology, applied in electrical digital data processing, memory address/allocation/relocation, instrumentation, etc., to solve system failures, shutdowns, etc.

Inactive Publication Date: 2008-03-19
SAMSUNG ELECTRONICS CO LTD
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  • Abstract
  • Description
  • Claims
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Problems solved by technology

[0016] When the interrupt delay time is extended in units of microseconds, serious problems may occur depending on the purpose of the program
In addition, systems may malfunction or shut down while processing of important events is delayed

Method used

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  • Apparatus and method for handling interrupt disabled section and page pinning apparatus and method
  • Apparatus and method for handling interrupt disabled section and page pinning apparatus and method

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Embodiment Construction

[0031] Advantages and features of the present invention and a method of achieving them will be more easily understood by referring to the following detailed description of exemplary embodiments and accompanying drawings. However, the present invention can be exemplified in various forms, but is not limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art, and the present invention will only be defined by the appended claims. Throughout the specification, the same reference numerals refer to the same components.

[0032] FIG. 3 is a block diagram illustrating an apparatus for processing an interrupt-off section according to an exemplary embodiment of the present invention.

[0033] The device 100 for processing disabled interrupt intervals includes: a generating unit 110 , a checking unit 120 , a lo...

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Abstract

An apparatus and method for handling an interrupt disabled section and page pinning apparatus and method are provided. An apparatus for handling an interrupt disabled section includes: a generating unit which generates a list of interrupt disabled sections, in which demand paging can occur, in order to execute a program; an examining unit which searches the generated list when the program demands to disable an interrupt and examines whether information corresponding to the interrupt disabling demand is included in the list; and a loading unit which reads out a page required to execute the program from an auxiliary storage device when the information corresponding to the interrupt disabling demand is included in the list, and loads the page into a physical memory.

Description

[0001] This application claims priority from Korean Patent Application No. 10-2006-0089803 filed with the Korean Intellectual Property Office on Sep. 15, 2006, the disclosure of which is hereby incorporated by reference in its entirety. technical field [0002] Apparatuses and methods according to the present invention relate to handling interrupt disabled sections and paging pinning, and more particularly to handling interrupt disabled sections and paging pinning by A demand paging (demand paging) system is effectively used by loading the pages required to run the program into the storage area of ​​the physical memory before the interrupt or after disabling the interrupt. Background technique [0003] When a computer program is created, the created program is physically divided into pages, which are allocated and loaded into frames (units of division) of the physical memory. Subsequently, the program can be executed by a central processing unit (CPU). In this case, only th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F12/08
CPCG06F12/0862G06F12/126G06F9/00G06F9/06G06F12/00G06F12/06
Inventor 金晓俊
Owner SAMSUNG ELECTRONICS CO LTD
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