Packaging structure of conducting wire holder on multi-chip stacking structure

Abstract

The present invention provides a package of line frame on stacked chips, and includes: a line frame consisted of several pairs of outer pins and several pairs of inner pins formed by several lines, and the several inner pins are divided into first inner pins group and second inner pins group, of which length of the first group is much longer than it of the second group; several semiconductor chip devices, and active surface of each chip is placed forward and interval to form offset-stack arrangement; the semiconductor chip device on top of the stack is fixed under the first inner pins group, and several semiconductor chip devices are electrically connected by the first inner pins group and the second inner pins group on small side.

Description

technical field [0001] The invention relates to a multi-chip stack packaging structure, in particular to a multi-chip stack packaging structure using a lead frame. Background technique [0002] In recent years, three-dimensional space (Three Dimension; 3D) packaging is being carried out in the back-end process of semiconductors, in order to achieve higher density or memory capacity with the least area. In order to achieve this goal, a chip stacked method has been developed to achieve a three-dimensional (Three Dimension; 3D) package at this stage. [0003] In the known technology, the chips are stacked by stacking multiple chips on a substrate, and then using a wire bonding process to connect the multiple chips to the substrate. FIG. 1 (including FIGS. 1A and 1B ) discloses a chip stack package structure based on a lead frame, wherein FIG. 1A is a schematic cross-sectional view and FIG. 1B is a schematic plan view of FIG. 1A . As shown in FIG. 1A , the lead frame 5 can be ...

AI Technical Summary

Problems solved by technology

[0004] In the above-mentioned known chip stack package structure, since the metal wires 10, 11, 12 between each chip and the platform portion 5c of the lead frame 5 have different lengths and radians, the length and radian are relatively different except during the packaging process. Long metal wires are prone to displacement and cause a short circuit of the chip, and the phase of the electrical signal changes due to the different lengths of the metal wires 10, 11, and 12.

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