Method and device for processing multichannel data
A data processing device and data processing technology, applied in the field of data communication, can solve the problems of consuming cache resources, consuming logic resources, etc.
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Embodiment 1
[0042] In order to save cache resources and logic resources, the method provided by the present invention can be used to improve the multi-channel data processing logic structure shown in FIG. 1 . The improved multi-channel data processing logic structure is shown in FIG. 3 .
[0043]In Fig. 3, the two packet information queues in the QM are divided into one group, and this group corresponds to an RD module and a TX module, and the TX module corresponds to two output channels of TX0 and TX1. Among them, the functions of the WR module, the QM module and the cache module are consistent with those in FIG. 1 , and will not be repeated here. The following mainly describes the working process of the RD module and the TX module in FIG. 3 .
[0044] In Figure 3, there are still two packet information queues FIFO0 and FIFO1 in the QM module, but there is only one RD module. At this time, the RD module can poll the two packet information queues in the QM, that is, read FIFO0 and FIFO1 in...
Embodiment 2
[0048] Figure 4 shows a schematic diagram of another common multi-channel data processing logic structure, including four inbound channels RX0, RX1, RX2, and RX3 with a bandwidth of 5G, and four outbound channels TX0 and TX1 with a bandwidth of 10G. , TX2 and TX3. Among them, the WR module is used to receive messages from the four data channels RX0, RX1, RX2 and RX3 on the ingress side, write the received messages into the cache module, and write The information of the packet is written into the QM module; QM includes four packet information queues FIFO0, FIFO1, FIFO2, and FIFO3, which are respectively used to store the packet information of the messages written by WR from RX0, RX1, RX2, and RX3 channels; RD0 , RD1, RD2, and RD3 modules are used to read packet information from FIFO0, FIFO1, FIFO2, and FIFO3 queues in QM respectively, read packets from the cache module according to packet information, and then pass TX0, TX1, TX2, and TX3 to The read telegram is sent out.
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