Low-jitter spread spectrum clocking generator

Abstract

The invention discloses a spread-spectrum clock generator, which comprises the following parts: phase frequency detector, which generates phase difference signal according to the received frequency dividing signal and reference signal with reference frequency; charge pump, which receives the phase difference signal to generate output current; loop filter, which receives and transforms the output current into voltage control signal; voltage control oscillator, which receives the voltage control signal to generate multiple voltage-controlled output signals with fixed phase difference and same voltage-controlled frequency; frequency dividing unit, which receives the multiple voltage-controlled output signal and produces the frequency dividing signal; triangular integral modulator, which is controlled by frequency dividing signal to generate the control value to control the frequency dividing unit to make the equivalent frequency dividing value of the frequency dividing unit at (N+b) S+(N-a) (P-S) (N, P and S is integral; a and b is fraction), wherein the triangular integral modulator can modulate S. The invention can improve the precision of voltage-controlled frequency, which reduces the shaking value.

Description

technical field [0001] The present invention relates to a clock generator, and in particular to a low-jitter spread-spectrum clock generator. Background technique [0002] Please refer to FIG. 1( a ), which is a schematic diagram of a known Fractional-N PLL. The PLL includes a Phase Frequency Detector (Phase Frequency Detector) 10, a Charge Pump (ChargePump) 20, a Loop Filter (Loop Filter) 30, a Voltage Controlled Oscillator (Voltage Controlled Oscillator) 40 and a Frequency Dividing Unit (Frequency Dividing Unit) )45. Wherein, the reference signal with a reference frequency Fref is generated by, for example, a reference oscillator (Reference Oscillator, not shown), and the reference signal and a frequency divided signal (Frequency divided signal) output by the frequency division unit 45 are input to the same time Phase Frequency Detector 10. The phase-frequency detector 10 can detect the phase and frequency difference between the reference signal and the frequency-divide...

AI Technical Summary

Problems solved by technology

That is to say, the accuracy of the voltage control frequency Fvco of the voltage control output signal is poor when changing, which will also cause the jitter value (Jitter Value) of the spread spectrum clock generator to be large

Furthermore, due to the poor frequency adjustment resolution of the spread spectrum clock generator of the above architecture, taking a 3GHz and 2500ppm spread spectrum clock generator as an example, its voltage-controlled frequency Fvco cannot be precisely controlled

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