Data processing system and method for memory arbitration

Abstract

The present invention relates to a data processing system is provided which comprises at least one first processing unit (CPU), at least one second processing unit (PU), at least one memory module (MEM), and an interconnect. The memory module (MEM) serves to store data from said at least one first and second processing unit (CPU, PU). The interconnecting means couples the memory module (MEM) to the first and second processing units (CPU, PU). In addition, an arbitration unit (AU.) is provided for performing the arbitration to the memory module (MEM) of the first and second processing units (CPU, PU). The arbitration is performed on a time window basis. A first access time during which the second processing unit (PU) has accessed the memory module and a second access time which is still required by the second processing unit (PU) to complete its processing are monitored during a predefined time window by the arbitration unit (AU). The second access time is compared to the remaining access time in the time window and if the remaining access time is larger than the second access time, the arbitration unit (AU) allows said at least one first processing unit (CPU) to access the memory module in said time window. Otherwise, the arbitration unit (AU) restricts the access of the at least one first processing units (CPU) and allows the at least one second processing unit (PU) to access the memory module (MEM).

Description

technical field [0001] The invention relates to a data processing system, a storage controller and a storage arbitration method. Background technique [0002] For a data processing system comprising multiple data processing units such as a central processing unit CPU and some special purpose processing units PU, communication is usually performed over a bus or interconnection network and data is stored in a central memory. The central processing unit CPU can implement programmable processing functions. In the data processing system, since memory resources are shared by multiple processing units, arbitration of the shared resources must be performed to determine which data processing unit is granted access to the shared memory. The arbitration schedules requests for accessing shared resources to ensure that the memory only needs to process one request at a time, and that requests from data processing units with high priority are processed more often than requests from other ...

AI Technical Summary

Problems solved by technology

[0005] A way to further address these needs is to limit the bandwidth available to low-latency traffic such that once low-latency traffic uses the extra bandwidth, it blocks waiting for critical traffic

However, the arbitration scheme may violate the requirements of hard real-time, because the efficiency of accessing memory may be different for various types of traffic

Furthermore, the arbitration scheme described requires extensive fine-tuning

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