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Radiating type stereo package structure and its manufacturing method

A technology of three-dimensional packaging and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve warping, reduction of the efficiency of the three-dimensional packaging structure 100, and influence on the structural strength and electrical transmission of the three-dimensional packaging structure 100. and other problems to avoid empty welding or open circuit

Active Publication Date: 2007-08-29
ADVANCED SEMICON ENG INC
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  • Abstract
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  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The first chip package 110 and the second chip package 120 of the three-dimensional packaging structure 100 will generate heat during operation, which causes the efficiency of the three-dimensional packaging structure 100 to decrease due to excessive temperature, and the first chip package 110 The second chip package 120 is prone to warping (warpage), which affects the structural strength and electrical transmission of the three-dimensional packaging structure 100

Method used

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  • Radiating type stereo package structure and its manufacturing method
  • Radiating type stereo package structure and its manufacturing method
  • Radiating type stereo package structure and its manufacturing method

Examples

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no. 1 Embodiment

[0021] According to the first specific embodiment of the present invention, please refer to FIG. 2 and FIG. 3 , a heat dissipation three-dimensional package structure 200 includes a heat sink 210, a first chip package 220, a second chip package 230 and a plurality of Solder balls 240. In this embodiment, the heat sink 210 has an opening 211 and a stiffener ring 212 (stiffener ring) inside the opening 211 . The heat sink 210 has an I-shaped cross section, and the reinforcing ring 212 is integrally formed on the heat sink 210 . The reinforcement ring 212 has a first surface 213 and a second surface 214 , and the opening 211 exposes the first surface 213 and the second surface 214 . The first chip package 220 includes a first substrate 221 . The first substrate 221 has an upper surface 222 and a lower surface 223 . The first substrate 221 is accommodated in the opening 211 of the heat sink 210 and is arranged on the first surface 213 of the reinforcing ring 212, and it can be ...

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Abstract

A heat-radiation solid package structure includes: a heat radiation sheet with an opening, a reinforcement ring set in the opening having a first surface and a second surface, in which, a first base board of a first chip package piece is contained in the opening and set at the first surface of the ring, a second base board of a second package piece is set on the second surface of the ring, and the first base board is connected with the second base board by multiple solder balls, heat generated by the two pieces is radiated by said radiation sheet, and the reinforcement ring can fix the two pieces for preventing that they will generate warp so as to be benefit to the form of solder balls and guarantee electric transmission of the products. This invention also provides a manufacturing method.

Description

technical field [0001] The present invention relates to a three-dimensional package structure (3D package) and its manufacturing method, in particular to a heat-dissipating three-dimensional package structure and its manufacturing method for positioning another chip package by using a heat sink disposed on one chip package. Background technique [0002] In a common semiconductor package type, a three-dimensional package structure stacks a plurality of chip packages on top of each other to achieve multi-functional purposes. However, since these chip packages generate a lot of heat during operation, it is necessary to install The heat dissipation component is used to maintain the normal working temperature of the three-dimensional package structure. In addition, when the chip packages are stacked, a boat must be used to position the chip packages to facilitate mutual stacking of the chip packages, resulting in increased production costs. In addition, if the dimensional error ...

Claims

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Application Information

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IPC IPC(8): H01L25/00H01L25/065H01L23/367H01L23/498H01L21/50H01L21/60
CPCH01L2924/15311H01L2924/15331H01L2224/73204H01L2224/16225H01L2224/73265H01L2924/15321H01L2924/3511H01L2224/48227H01L2224/32225H01L24/73
Inventor 刘明祥
Owner ADVANCED SEMICON ENG INC
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