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Method and apparatus for testing integrated circuits

A test module and test system technology, applied in digital circuit testing, electronic circuit testing, etc., can solve problems such as impossible plug and play, and achieve the effects of reducing test costs, reducing work intensity, and accelerating turnaround time.

Inactive Publication Date: 2009-01-28
ADVANTEST CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to the proprietary nature of conventional test systems and the proprietary nature of the data format in each vendor's device, it is often not possible to plug and play another vendor's device

Method used

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  • Method and apparatus for testing integrated circuits
  • Method and apparatus for testing integrated circuits
  • Method and apparatus for testing integrated circuits

Examples

Experimental program
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Embodiment Construction

[0034] figure 1 Shown is the general architecture of the conventional tester, showing how the signal is generated and applied to the device under test (DUT). Each DUT input pin is connected to the driver 2 of the application test data, and each DUT output pin is connected to the comparator 4 (comparator). In most cases, tri-state driver-comparators are used, so that each test pin (channel) can be used as both an input pin and an output pin. The collection of test pins used for a single DUT forms a test site, which is associated with a timing generator 6 (timing generator), a waveform generator 8 (waveform generator), and a pattern memory 10 (pattern memory). A timing data memory 12 (timing data memory), a waveform memory data 14 (waveform memory data) and a block 16 (block) defining a data rate (data rate) work together.

[0035] figure 2 Shown is a system architecture 100 according to an embodiment of the invention. The system controller (SysC) 102 is coupled to a plurality o...

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PUM

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Abstract

The present invention describes a distributed operating system for semiconductor test systems, such as automated test equipment (ATE). The operating system includes a main operating system for controlling one or more field controllers through a system controller. One or more local operating systems, each associated with an on-site controller, control the one or more test modules through an associated on-site controller. Each test module performs a test on a corresponding DUT at a test site.

Description

Technical field [0001] The present invention relates to the testing of integrated circuits (IC), and more particularly to automated test equipment (ATE) for testing one or more ICs. Background technique [0002] This application claims the priority of the following applications: Application No. 60 / 449,622 filed on February 24, 2003, entitled "Method and Apparatus for Testing Integrated Circuits"; Application No. 60 / 449,622 filed on February 14, 2003 No. 60 / 447,839, titled "Methods and Structures for Developing Test Programs for Semiconductor Integrated Circuits"; U.S. Application No. 10 / 404,002 filed on March 31, 2003, titled "Test Simulator, Test Module Simulator, And the storage program of the recording medium"; U.S. Application No. 10 / 403,817 filed on March 31, 2003, entitled "Testing Apparatus and Test Method", all of the above applications are incorporated herein by reference in their entirety. This application also refers in full to the concurrently filed U.S. Application N...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/319
Inventor 安肯·拉马尼克马克·艾尔斯顿陈良力罗伯·萨乌尔
Owner ADVANTEST CORP
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