Entering and exiting power managed states without disrupting accelerated graphics port transactions

Abstract

An interface between an accelerated graphics port graphics controller (AGP-GC) and a core controller to prevent entry into a low power state from interfering with transfers to or from the AGP-GC that have been requested but not completed. The core controller can communicate to the AGP-GC an intent to enter a low power state, while the AGP-GC can communicate to the core controller the busy status of the AGP-GC. When the AGP-GC receives notice of an intent to enter a low power state, it can stop issuing requests to the core controller. When the core controller detects that the AGP-GC is busy, the core controller can postpone entry into the low power state until the AGP-GC completes any requests that are in progress. In an alternate use of the interface, if the AGP-GC wishes to make a request during a low power state, it can signal the core controller of this need by indicating a busy status, which can trigger the core controller to initiate an exit from the low power state.

Description

[0001]The present patent application is a Divisional of application Ser. No. 09 / 751,441, filed Dec. 29, 2000, now U.S. Pat. No. 6,738,068.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The invention pertains generally to computer systems. In particular, it pertains to managing transitions between power states in computer systems.[0004]2. Description of the Related Art[0005]As computer design has relied on more and more buses to accommodate increasing volumes of data transfers, many computers have incorporated a chip set, often referred to as the “core”, or “core controller”, to act as a centralized controller, providing separate interfaces and control logic to connect the processor (CPU), system memory, and various other peripheral devices. In particular, an increased focus on graphics has led to a separate graphics controller, interfaced to the core controller through a dedicated graphics bus. One version of the graphics controller interface is referred to as the A...

AI Technical Summary

Problems solved by technology

Entering low power state C3 can cause problems with the operation of AGP-GC 13 because entry into this state can prematurely terminate any AGP-GC transaction that is in progress, causing a loss of any untransferred data and loss or corruption of any requests remaining in queue 12.

If less time is required to actually complete the transfer, the remaining time is wasted, which can affect the efficiency of the system and lead to increased power usage by unnecessarily delaying entry into a sleep state.

However, if more than the allotted time is required to complete the transfer, some of the data will be lost when the time period expires and a low power state is entered before the data transfer completes.

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