Deposition of silicon germanium on silicon-on-insulator structures and bulk substrates

Abstract

Methods are provided for producing SiGe-on-insulator structures and for forming strain-relaxed SiGe layers on silicon while minimizing defects. Amorphous SiGe layers are deposited by CVD from trisilane and GeH4. The amorphous SiGe layers are recrystallized over silicon by melt or solid phase epitaxy (SPE) processes. The melt processes preferably also cause diffusion of germanium to dilute the overall germanium content and essentially consume the silicon overlying the insulator. The SPE process can be conducted with or without diffusion of germanium into the underlying silicon, and so is applicable to SOI as well as conventional semiconductor substrates.

Description

PRIORITY APPLICATION [0001] This application claims the benefit of U.S. Provisional Patent Application 60 / 489,691, filed 23 Jul. 2003, the entire disclosure of which is hereby incorporated by reference herein.FIELD OF THE INVENTION [0002] The present invention relates generally to strained silicon on strain relaxed silicon germanium, including silicon-germanium-on-insulator (“SGOI”) technology in integrated circuit fabrication. BACKGROUND OF THE INVENTION [0003] To improve device performance, a trend is developing for replacing conventional “bulk” silicon wafers with so-called silicon-on-insulator (“SOI”) wafers. The advantage of SOI technology is that the silicon in which transistors are made is not in electrical contact with the remainder of the wafer, such that no cross-talk among transistors takes place through the wafer bulk. The transistors are more effectively electrically isolated from one another. [0004] SOI technology typically employs a thin (e.g., about 100 nm) insulatin...

AI Technical Summary

Benefits of technology

"The invention describes methods for forming strained silicon on strain relaxed SiGe-on-insulator structures. These structures can be used in semiconductor devices and can provide improved performance. The methods involve depositing an amorphous SiGe layer on a substrate and annealing it to produce a relaxed SiGe layer over an oxide. The strain relaxed SiGe layer can then be used to deposit a strained silicon layer. The technical effects of the invention include improved strain control and better performance of semiconductor devices."

Problems solved by technology

These steps are rather expensive, however, and the quality of the insulating layer and the active silicon thereover is somewhat compromised.

Furthermore, the bonding and thinning processes are complicated and rather expensive.

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