Non-volatile memory and fabricating method thereof

Abstract

A method of fabricating a non-volatile memory is provided. A plurality of columns of isolation structures are formed on a substrate. A plurality of rows of stacked gate structures crossing over the isolation structures are formed on the substrate. A plurality of doping regions are formed in the substrate between two neighboring stacked gate structures. A plurality of stripes of spacers are formed on the sidewalls of stacked gate structures. A plurality of first dielectric layers are formed on a portion of the isolation structures adjacent to two rows of stacked gate structures. Also, one isolation structure is disposed between two neighboring first dielectric layers in the same row, while two neighboring rows comprising the first dielectric layer and the isolation structure are arranged in an interlacing manner. A plurality of first conductive: layers are formed between two neighboring first dielectric layers in the same row.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a memory device and fabricating method thereof. More particularly, the present invention relates to a non-volatile memory and fabricating method thereof. [0003] 2. Description of The Related Art [0004] Non-volatile memory is a type of memory that allows writing, reading and erasing data for multiple times, and the stored data will be retained even after power supplied to the device is off. Furthermore, non-volatile memory also has the advantages of small size, fast access speed and low power consumption. In addition, data can be erased in a block-by-block fashion so that the operating speed is further enhanced. With these advantages, non-volatile memory has become one of the most widely adopted memory devices for personal computers and electronic equipments. [0005] A typical non-volatile memory comprises an array of memory cells. The horizontally laid memory cells are serially connec...

AI Technical Summary

Benefits of technology

The present invention provides a method and structure for fabricating a non-volatile memory that can resolve the misalignment problem in the conventional contact fabricating process. The method includes forming a substrate with columns of isolation structures, followed by the formation of rows of stacked gate structures that cross over the isolation structures. The stacked gate structures include a bottom dielectric layer, a charge storage layer, a top dielectric layer, and a control gate layer sequentially disposed over the substrate. The method also includes forming doping regions in the substrate between neighboring rows of stacked gate structures, and forming stripes of spacers on the sidewalls of stacked gate structures. The structure includes a substrate with columns of isolation structures, rows of stacked gate structures, and stripes of spacers. The invention also provides a non-volatile memory that includes a substrate with columns of isolation structures, rows of stacked gate structures, and doping regions. The technical effects of the invention include minimizing misalignment between contacts and source / drain regions, increasing process window, and achieving higher level of integration of the memory.

Problems solved by technology

However, in the process of forming such contacts, misalignment between the contacts and the source regions or the drain regions occurs easily, which would reduce device reliability.

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