Master-slave synchronization communication method

A technology of synchronous communication and master device, which is applied in the direction of synchronous device, multiplex communication, and branch office to provide special service devices, etc., and can solve the problems of fixed inherent period and so on

Inactive Publication Date: 2006-08-30
YASKAWA DENKI KK
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0013] Another problem with the prior art master / slave synchronous communication method is that even when it is necessary to provide a communication period longer than the natural period because the number of slaves increases, the natural period is fixed and cannot be modified

Method used

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Examples

Experimental program
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no. 1 example

[0060] First, the functional part names and signal names specified in the IEEE1394 standard appearing in the following description will be explained. As shown in FIG. 5, the CYCLE_TIME register includes a cycle_offset part, a cycle_count part, and a second_count part. The cycle_offset unit counts the 24.576 MHz clock in each station. When the count reaches 3072, that is, every 125μs of the natural cycle, the cycle_offset section outputs a carry. The cycle_count section counts the carry from the cycle_offset section. When the count reaches 8000, that is, every time ls passes, the cycle_offset part outputs a carry. Cycle_synch is a synchronization signal issued every natural cycle 125 μs.

[0061] FIG. 1 shows a specific embodiment of the first invention, wherein reference numeral 1 represents a master device, reference numeral 2i (i=1, 2, . . . , n) represents a slave device, and reference numeral 3 represents a transmission path of IEEE1394. Reference numeral 10j (j=0, 1, ...

no. 2 example

[0072] Next, an embodiment of the synchronization point detecting section 14j that synchronizes the updating of the fundamental period counter 12j will be described. In fact, the detection of the synchronization point is performed separately for the master device 1 and each slave device 2i, and the result is reflected in the value of the basic cycle counter 12j of each station. The period used as its synchronization point requires the same determination result from all stations. Although in the present embodiment, the value of the basic cycle counter 12j is 0 at this synchronization point, and the value of the basic cycle counter 12j is all incremented every time a basic cycle is passed (that is, the Cycle_synch event 11j occurs), and the basic cycle counter 12j The value of is returned to 0 at the next synchronization point after a predetermined communication cycle elapses, however, the switching of the value of the basic cycle counter 12j is not limited thereto, for example,...

no. 3 example

[0076] The third invention will be described as another method of the synchronization point detection processing 14j. In the synchronization point detection process 140 of the master device 1, the synchronization point detection section is started by the Cycle_synch event 11j every natural cycle, and only the basic cycle counter 120 is incremented and it is determined whether the value is 0 or not. The command data transmitted from the master to each slave according to the transmission management table includes the CYCLE_TIME register value of the next synchronization point.

[0077] Processing in each slave device 2i will be described along with FIG. 9 . First, at S4000, the process determines whether command data from the master device 1 was received in the last basic cycle. In the case of receiving data, the process extracts the CYCLE_TIME register value as the next synchronization point in the received command data at S4001. Next, at S4002, the process obtains the differ...

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PUM

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Abstract

There is provided a master-slave synchronization communication method capable of prolonging the communication cycle according to the number of stations (communication load) without causing a jitter at the synchronization point of the communication cycle and performing transmission scheduling in such a manner that data is transmitted after a predetermined time from the synchronization point. The master-slave synchronization communication method uses the unique cycle of the IEEE1394 communication as a basic cycle and a communication cycle set to be an integral multiple of the basic cycle. Each station includes detection means for detecting a synchronization point which is a communication cycle start timing and a basic cycle counter indicating how may basic cycles precede the current cycle from the synchronization point (after a synchronization point is detected, counter values in all the stations are identical). The master transmits an instruction to each slave according to the transmission management table assigned in advance for each of the basic cycle counter values. Each slave transmits response data to the master according to the transmission timing information in which the basic cycle counter value is set for transmitting the response.

Description

technical field [0001] The present invention relates to a communication method of a real-time control system that performs master / slave synchronous communication by using IEEE1394. Background technique [0002] In the master device / slave device synchronous communication mode of the prior art, similar to PROFIBUS-DP, the master device simultaneously broadcasts a data packet notifying the synchronization point of the communication cycle, and each slave device detects the synchronization point according to its receiving timing, and thereafter, through Polling is used to exchange command data and response data (for example, see Non-Patent Document 1). [0003] In another mode such as SERCOS (registered trademark), the master device simultaneously broadcasts a data packet notifying the synchronization point of the communication cycle, and then transmits instruction data to each slave device, while each slave device passes a predetermined time period from the synchronization point...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/28H04L7/00G06F13/38H04J3/06H04L12/40H04L12/64
CPCH04L12/40052H04J3/0652H04J3/0638H04L12/403H04L7/00H04L12/12H04L12/16H04L12/28
Inventor 藤原昇
Owner YASKAWA DENKI KK
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