Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Quick method for implementing noise optimization of integrated circuit supply network using decoupling capacitor

A power supply network and integrated circuit technology, applied in the field of RLC power line/ground line network noise optimization, can solve the problems of unsatisfactory optimization effect, inability to apply power supply/ground line network optimization work, and high algorithm time and space complexity, Achieve good optimization results, save running time, and reduce scale

Inactive Publication Date: 2004-08-25
TSINGHUA UNIV
View PDF0 Cites 21 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] There are generally some problems in the work done by predecessors in this field, which lead to high time and space complexity of the algorithm, and the optimization effect is not satisfactory. Therefore, it cannot be applied to the actual power / ground network optimization work in the industry.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Quick method for implementing noise optimization of integrated circuit supply network using decoupling capacitor
  • Quick method for implementing noise optimization of integrated circuit supply network using decoupling capacitor
  • Quick method for implementing noise optimization of integrated circuit supply network using decoupling capacitor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0117] Use the def and 1ef format test circuit example u_cnt100 provided by the industry as an example combination Figure 8 The method of the present invention is used to optimize the addition of decoupling capacitors.

[0118] 1. Read in files - u_cnt100.lef containing library unit information, u_cnt100.def containing unit interconnection information, parameter file power.params and file current.dat containing sink current information. Establish the structure of the circuit according to the information read in;

[0119] 2. Transient analysis based on the equivalent circuit is carried out on the established power supply network, and the voltage waveforms of 806 nodes on the network are obtained;

[0120] 3. The result of transient analysis of this power supply network is that there are 91 violation points, such as Figure 10 As shown, the network needs to be optimized by adding decoupling capacitors;

[0121] 4. The voltage waveforms on the 744 leaf nodes are segmented and...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A method for noise optimization to IC supply network with decoupling capacitance characterizes in that it utilizes a computer to model the optimization of a supply network against ASIC diagram location structure feature and the supply network based on a standard diagram and applies a nonlinear program method In this inventionú¼area of the decoupling capacitance is the target of optimization to minimize its area to reserve enough blank space for latter stage of work such as buffer plug. Equivalent circuit method is used in the resolving process to reduce the resolving scale greatly to increase speed and save memory.

Description

technical field [0001] The method for noise optimization of integrated circuit power supply network by decoupling capacitor belongs to the field of VLSI physical design, especially the technical category of noise optimization of RLC power line / ground line network in the field of layout and wiring. Background technique [0002] The routing stage in the physical design of integrated circuits can be divided into two parts: special net routing and signal net routing. The power / ground network design is included in the special network routing section. With the increase of VLSI integration and operating frequency, the design and optimization of its power / ground network becomes more and more important, which directly affects the performance of the entire circuit. Since the line width of the power / ground network is much larger than that of the signal line and can be varied, it takes up a lot of chip area, so it is given the highest priority in the routing stage. [0003] With the c...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F17/50H01L21/82H01L27/00
Inventor 洪先龙蔡懿慈傅静静骆祖莹潘著谭向东
Owner TSINGHUA UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com