Emulate testing system and testing method for universal digital circuit

Abstract

The invention discloses a general purpose digital circuit simulated test system and test method thereof, wherein the system comprises a data source for generating test excitation data, a bus functional module BFM for mapping the excitation data into time sequence in accordance with the bus standard, and at least a two-way measurement unit, while the corresponding method comprises sending the timesequence of the excitation data to the test design, and performing two-way test in parallel, thus enhancing the versatility of the simulation test and improving the code multiplexing ratio and expandability. íí

Description

technical field [0001] The invention relates to the simulation test of general digital circuit design. Background technique [0002] Usually, the design of integrated circuits is to map the logic requirements to be completed into some files required for production, such as netlists, layouts, etc., and the simulation test of the design is to use the computer to check the output of the design stage before production, that is, Use EDA (Electronic Design Automatic) tool software to simulate the use of integrated circuits on actual circuit boards after they are produced, which can effectively reduce production risks. At present, in the design of ASIC (Application Specific Integrated Circuit) and FPGA (Field Programmable Gate Array), simulation test has become the bottleneck of the whole design. In complex ASIC and FPGA projects, the proportion of simulation testing workload has generally reached or exceeded 70%, and as the design scale increases, the scale of test verification i...

AI Technical Summary

Problems solved by technology

If the stimulus data module needs to be changed, the processing module must be changed accordingly, otherwise the test system cannot continue to run

[0006] Second, the scalability of the entire test environment is poor

The test code for module test cannot be directly reused in chip test; the code for chip test cannot be directly reused in system test; the code for this system test cannot be directly reused in another system test

[0007] 3. In the existing test method, the test code and DUT are a whole, and the two together form a runnable simulation environment. Without the specific circuit, the test environment cannot run independently

In this way, the debugging of the test code itself and the debugging of the DUT are all concentrated in the joint debugging stage in the later stage of the design, which brings great risks to the entire design, and the larger the design scale, the greater the risk

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