Chip packaging pin distribution method and device, electronic equipment and storage medium

Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a chip packaging pin distribution method and device, electronic equipment and a storage medium, and the method comprises the steps: displaying a control interface; acquiring a setting instruction for the control interface; based on the setting instruction, creating and displaying a blank chip pin diagram; acquiring a processing instruction for the control interface; loading a file based on the processing instruction, and determining attributes of each bare chip pin and each chip pin according to the file; displaying the names of the bare chip pins and the chip pins in a menu form; obtaining an operation instruction for each chip pin position in the chip pin diagram; updating the chip pin diagram based on the operation instruction, and recording a corresponding distribution result; determining a connection relationship between each bare chip pin and each chip pin based on the corresponding distribution result; and outputting the determined connection relationship according to a preset format. According to the invention, the chip pin connection relationship can be managed in a more intuitive and simple manner, and the labor cost is saved.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of semiconductor manufacturing, and in particular to a chip package pin assignment method, device, electronic equipment, and storage medium. Background technique [0002] Package (Package) is the process of assembling an integrated circuit die (Die) into a chip. It is necessary to place the integrated circuit die (Die) on a substrate that acts as a load bearing, and then lead the die pin (pad) out of the package. Get the chip pins (pins) available for connection. [0003] At present, in order to realize chip package pin allocation, chip designers need to provide package designers with the connection relationship between bare chip pins and chip pins, and sometimes need to provide chip pin maps for package designers refer to. Because there are often a large number of chip pins, when chip designers assign chip package pins, the work is cumbersome and repetitive, which is easy to introduc...

AI Technical Summary

Problems solved by technology

[0004] Based on the cumbersome and error-prone problem of chip package pin allocation, the present invention provides a chip package pin allocation method, device, electronic equipment, and storage medium, which can manage chip pin connection relationships in a more intuitive and simple manner, saving Labor cost

Images