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Integrated circuit digital back-end ECO method and system and computer storage medium

An integrated circuit and digital technology, applied in the field of systems and computer storage media, integrated circuit digital back-end ECO methods, to achieve the effects of improving efficiency, reducing costs, and not easy to miss

Active Publication Date: 2022-05-13
NANJING QINHENG MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] Purpose of the invention: In order to solve the problem that in the prior art, when the ECO logic is relatively complex, it is impossible to quickly and efficiently complete the multiplexing of the original first metal layer and the first via layer to reduce the number of modified layers in the ECO process and improve the ECO efficiency, the present invention provides an integrated circuit digital back-end ECO method, system and computer storage medium

Method used

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  • Integrated circuit digital back-end ECO method and system and computer storage medium
  • Integrated circuit digital back-end ECO method and system and computer storage medium
  • Integrated circuit digital back-end ECO method and system and computer storage medium

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Embodiment 1

[0038] This embodiment provides an integrated circuit digital back-end ECO method, such as Image 6 , including the following steps:

[0039] The back-end design tool reads the netlist after logic ECO (also called functional ECO, which means that the logical relationship has changed) into the original design database, and obtains the pins that need to be changed and the original connection relationship of the pins. The original connection relationship of the pin is obtained by the original network name of the pin, and the connected pins need to be changed to form a pin list. The net name of the original line in the net name list corresponds one by one, according to a pin, you can find the net name of the original line corresponding to the pin;

[0040] The back-end design tool changes the original line net names of the pins that need to be changed in the original design database and the renaming objects of the pins to the new line net names according to the netlist after the ...

Embodiment 2

[0062] Compared with Embodiment 1, the difference between Embodiment 2 and Embodiment 1 is that in the integrated circuit digital back-end ECO method provided by Embodiment 2, in step 3, the central area is determined according to the attributes of the pins, and the central area is a polygonal area. The coordinates of many points on the boundary of the pin are determined, and the determined polygonal area is the area where the pin is located.

[0063] Here is a brief description of the reasons for providing these two embodiments. Embodiment 1 uses coordinate points at two opposite corners of the pin to determine a rectangular area. It is a method of directly using existing design tools to determine the position of the pin. In Embodiment 1, The back-end design tool can continue the existing design tool as much as possible, and add other functions on this basis, and the original functions will not be modified. In the second embodiment, as a newly designed back-end design tool, t...

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Abstract

The invention discloses an integrated circuit digital back-end ECO method and system and a computer storage medium, and the method comprises the steps that a back-end design tool obtains a pin list and an original line net name list according to an original design database and a net list after logic ECO; according to the netlist after logic ECO, the back-end design tool changes original line net names of pins needing to be changed in an original design database and renamed objects of the pins into new line net names, a new design database is obtained, and the renamed objects comprise metal shapes and via holes; obtaining a new design database; and performing ECO wiring. According to the method, the multiplexing of the first metal layer and the first via hole layer can be quickly and efficiently realized, so that the number of ECO modification layers is reduced, the ECO efficiency is improved, the ECO cost is reduced in an auxiliary manner, and the method is not limited by the complexity of a chip, is high in accuracy, and is particularly suitable for scenes with relatively complex chips, more pins and relatively complex connection logic.

Description

technical field [0001] The invention belongs to the technical field of design automation EDA in the integrated circuit design industry, and in particular relates to an integrated circuit digital back-end ECO method, system and computer storage medium. Background technique [0002] As the scale of integrated circuits becomes larger and larger, many designs have reached millions of gates. Although many logic analysis, simulation, and FPGA actual test verifications are performed before tape-out, it is still difficult to cover all function combinations. Some functional bugs will be found, and ECO (Engineering Change Order) is required to solve them. ECO means that the underlying physical unit of the layout is not changed after tape-out, and some spare cells are used to change the connection only by changing the metal layer wiring, so as to achieve the purpose of repairing the logic function. Compared with re-spinning, the ECO method has a shorter cycle time and is more cost-eff...

Claims

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Application Information

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IPC IPC(8): G06F30/327G06F30/394
CPCG06F30/327G06F30/394
Inventor 冯科磊
Owner NANJING QINHENG MICROELECTRONICS CO LTD
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