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Chip bonding pad information extraction method and system and electronic equipment

A technology of information extraction and chip pads, which is applied in electrical digital data processing, computer-aided design, instruments, etc., can solve the problems of low accuracy rate and the inability to collect statistics by means of padopen, and achieve the goal of improving efficiency and speed of information extraction Effect

Pending Publication Date: 2022-04-12
SHENZHEN DAPU MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the existing padopen data extraction method leads to low accuracy through manual recording, and the method of extracting padopen embedded in EDA tools cannot be counted

Method used

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  • Chip bonding pad information extraction method and system and electronic equipment
  • Chip bonding pad information extraction method and system and electronic equipment
  • Chip bonding pad information extraction method and system and electronic equipment

Examples

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Embodiment Construction

[0056] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, not to limit the present application. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

[0057]It should be noted that, if there is no conflict, various features in the embodiments of the present application may be combined with each other, and all of them are within the protection scope of the present application. In addition, although the functional modules are divided in the schematic diagram of the device, and the logical order is shown in the flowchart, in some cases, the divisio...

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PUM

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Abstract

The embodiment of the invention relates to the field of storage device application, and discloses a chip bonding pad information extraction method and system and electronic device.According to the method, configuration information of a chip layout is obtained, and the configuration information comprises length information and width information of the chip layout and bonding pad area information of each bonding pad area of a chip; each pad area comprises a plurality of pads, coordinate information of each pad of the chip layout is determined, the pad area corresponding to each pad is determined, a pad layout of the chip is generated according to length information and width information of the chip layout and the coordinate information of each pad, the pad layout is processed to generate a pad distribution diagram, and the pad distribution diagram is sent to the chip layout. According to the embodiment of the invention, the information extraction speed of the chip bonding pad can be improved, and the bonding pad layout of the chip is output, so that the packaging production efficiency is improved.

Description

technical field [0001] The present application relates to the field of semiconductors, in particular to a chip pad information extraction method, system and electronic equipment. Background technique [0002] During the manufacturing process of a flash memory device, such as a solid state drive (Solid State Drives, SSD), it is usually necessary to package the chip. In chip packaging, the connection between the chip and the lead frame (or substrate) provides circuit connections for power and signal distribution. It is an important step in the packaging process to ensure that the chip is electrically connected to the outside of the package and the input / output is unimpeded. At present, the mainstream ones are flip chip bonding (Flip Chip Bonding) and wire bonding (Wire Bonding), which can realize the connection between the chip and the lead frame (or substrate). Although the application of flip-chip bonding is growing rapidly, the majority of connection methods are still wir...

Claims

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Application Information

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IPC IPC(8): G06F30/392G06F113/18
Inventor 刘振声黄运新
Owner SHENZHEN DAPU MICROELECTRONICS CO LTD
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