Frequency preset control method and device based on FPGA (Field Programmable Gate Array), medium and electronic equipment
A control method and frequency technology, applied in the field of radar communication, can solve the problems of insufficient preset accuracy and unreasonable preset.
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Embodiment 1
[0060] Embodiment 1, this embodiment provides an FPGA-based frequency preset control method, the method comprising:
[0061] In the first step, (the device in Embodiment 2) is powered on as a whole, the frequency source is initialized, and the output frequency of the frequency source is configured to the initial frequency point;
[0062] The second step is to configure the register corresponding to the target frequency point pre-stored in RAM1 to the frequency source phase-locked loop;
[0063] Store the register values corresponding to multiple target frequency points into RAM1;
[0064] According to the current target frequency point, configure the corresponding register to the frequency source PLL.
[0065] The configuration may take a certain amount of time, so when performing the second step, you need to configure a certain waiting time to wait for the configuration to be completely completed.
[0066] The third step is to judge whether the target frequency point is l...
Embodiment 2
[0080] This embodiment is an optimization for the first embodiment. In this embodiment, if the frequency of tuning the voltage at the target frequency point is too small, errors may occur. Therefore, this embodiment provides an optimization method.
[0081] S1. Set the number N of collection times of the tuning voltage at the target frequency point, where N=10 in this embodiment.
[0082] S2. Determine whether the tuning voltage of the target frequency point has been collected. If the collection has not been completed, it may prove that the initial frequency point is wrong, the frequency source lock is abnormal, the target frequency point is abnormal, etc., so jump to the first step and proceed again. Configuration, if the collection is still abnormal many times, an alarm will be issued;
[0083] S3. If the collection is completed, the number of collections is n+1;
[0084] S4. Judging whether n is equal to 10, if not, jumping to the second step again, performing the second a...
Embodiment 3
[0088] This embodiment provides a modular structure for implementing Embodiment 1, a frequency preset control device based on FPGA, including an initial module, a first configuration module, a determination module, an acquisition module, a processing module, a second configuration module and an output module.
[0089] The initial module is used to initialize the frequency source and configure the output frequency of the frequency source to the initial frequency point;
[0090] The first configuration module is used to configure the register corresponding to the target frequency point pre-stored in RAM1 to the frequency source phase-locked loop;
[0091] The judging module is used to judge whether the target frequency point is locked;
[0092] The acquisition module is used to collect the tuning voltage of the target frequency when the target frequency is locked, and store it in RAM2;
[0093] The processing module is used to establish a frequency point-tuning voltage look-up...
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