Memory fault processing method and device

A fault handling method and memory technology, applied in the computer field, can solve problems such as large system downtime, inability to accurately judge the severity of memory faults, accurate location of memory faults, poor fault isolation accuracy and coverage, etc.

Pending Publication Date: 2022-02-18
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This repair method cannot accurately determine the severity of the memory fault and the exact location of the memory fault, resulting in poor accuracy and coverage of fault isolation, and a high possibility of system downtime

Method used

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  • Memory fault processing method and device
  • Memory fault processing method and device
  • Memory fault processing method and device

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Embodiment Construction

[0061] The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In this application, "at least one" means one or more, and "multiple" means two or more. "And / or" describes the association relationship of associated objects, indicating that there may be three types of relationships, for example, A and / or B, which can mean: A exists alone, A and B exist simultaneously, and B exists alone, where A, B can be singular or plural. The character " / " generally indicates that the contextual objects are an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one item (piece) of a, b or c can represent: a, b, c, a and b, a and c, b and c, or, a and b and c, wherein a, b and c can be single or multiple. In addition, in order to clearly de...

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Abstract

The embodiment of the invention discloses a memory fault processing method and device, relates to the technical field of computers, and solves the problem of system downtime caused by memory faults in the prior art. According to the specific scheme, a management module obtains the error information of a memory; the management module adopts a machine learning algorithm to determine a fault characteristic mode of the memory or adopts an isolation repair technology for repairing the memory based on the error information of the memory; and the management module determines to repair the memory by adopting at least one of hardware isolation or software isolation based on the fault feature mode of the memory or the isolation repair technology adopted for repairing the memory.

Description

[0001] This application claims the priority of the Chinese patent application with the application number 202010778351.0 and the application title "a method and device for predicting and repairing memory faults" submitted to the State Intellectual Property Office on August 5, 2020, the entire contents of which are incorporated by reference in this application. technical field [0002] The embodiments of the present application relate to the technical field of computers, and in particular, to a memory fault processing method and device. Background technique [0003] Dynamic random access memory (dynamic random access memory, DRAM) is a common random access memory, which is widely used in the storage field. As the capacity of DRAM memory increases, the basic failure rate becomes higher and higher. Generally, after an error occurs in the memory, an error correction algorithm such as error checking and correction (ECC) can be used to correct the error. However, if frequent err...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07G11C29/44
CPCG06F11/073G06F11/079G06F11/0793G11C29/4401
Inventor 鲍全洋韩林
Owner HUAWEI TECH CO LTD
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