Direct current offset calibration system and method

Abstract

The invention provides a direct current offset calibration system and method. The system is arranged at a receiver end to process differential input signals and operates in one of a working mode, a first calibration mode and a second calibration mode. The system comprises a matching circuit, an equalization circuit, an amplification circuit, a control circuit, a first digital-to-analog conversion circuit and a second digital-to-analog conversion circuit, wherein the equalization circuit is electrically connected with the matching circuit, the amplification circuit is electrically connected with the equalization circuit, and the control circuit is electrically connected with the amplification circuit. In the operating mode, the matching circuit provides impedance matching for the differential input signal. A first digital signal and a second digital signal are respectively output in the first calibration mode and the second calibration mode. The first digital-to-analog conversion circuit and the second digital-to-analog conversion circuit respectively generate a first differential calibration signal and a second differential calibration signal according to the first digital signal and the second digital signal. In the first calibration mode, the amplification circuit generates a first amplification signal according to the first differential calibration signal, and feeds back and adjusts the first digital signal; and in the second calibration mode, the equalization circuit and the amplification circuit generate a second amplification signal according to the second digital signal, and feed back and adjust the second digital signal.

Description

technical field [0001] The invention relates to the field of DC offset calibration, in particular to a DC offset calibration system and method thereof. Background technique [0002] With the continuous advancement of integrated circuit technology, high-speed serial communication technology has been further developed. However, with the increase of clock speed and various unideal factors in transmission (such as transmission line loss, process deviation), it will cause high-speed reception. The transmission performance of the terminal circuit is degraded, and even the requirements of the high-speed data transmission protocol cannot be met. In view of the above situation, it is necessary to add terminal matching circuit, equalization circuit and sense amplifier to the high-speed receiver circuit to overcome it, but adding these circuits also introduces process deviation and DC offset error, so it is very important to eliminate these errors. At present, the technology of elimin...

AI Technical Summary

Problems solved by technology

Reduce the offset error by directly increasing the device area. Although this method is simple, it will affect the working speed of the high-speed receiver circuit.

The method of adding an analog auxiliary circuit is to use a low-pass filter to first filter out the high-frequency component of the signal to obtain a DC level to control and eliminate the DC offset, but the disadvantage is that the low-pass filter circuit also needs to occupy the device area, and it will also affect the high-speed The working speed of the receiver circuit

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