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Formation method of semiconductor device

A semiconductor and device technology, applied in the field of semiconductor device formation, can solve problems such as high process difficulty and poor performance of semiconductor devices

Active Publication Date: 2021-11-16
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to solve the problem of poor performance of semiconductor devices and high process difficulty in the prior art

Method used

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  • Formation method of semiconductor device

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Embodiment Construction

[0032] As described in the context, in the prior art, as the device size is reduced, the distance between the plug is reduced, and it is easy to short-circuit, which affects the performance of the device. And when the position of the plug opening is defined, the position of the formed barrier layer is high, and the process is difficult.

[0033] In order to solve the above problems, this embodiment proposes a method of forming a semiconductor device, a reference figure 1 A flow chart of the formation method of the semiconductor device provided by the embodiment of the present invention, including the following steps:

[0034] Step S11: Provides the substrate, the substrate includes a cell region, the cell region includes a first combination region and a second composite region, the first combination region, and the second combination region including the first combination region, including the first direction. An extension region, the second extension region, and the third extensi...

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Abstract

The invention discloses a formation method of a semiconductor device. The method comprises the steps of forming a first barrier layer; forming a second barrier layer at the junction of a first combination area and a second combination area; taking the second barrier layer as a mask, and forming a first gate contact opening located on a pull gate structure in the dielectric layer at two sides of the second barrier layer; forming a first plug opening in a first extension region in the dielectric layer by taking the first barrier layer and the second barrier layer as masks; removing the second barrier layer; and forming a second plug opening positioned on a second extension region and a third extension region and a second gate contact opening positioned on a transmission gate structure in the dielectric layer. According to the invention, the short circuit of a first plug on the first combination region and a first plug on the second combination region is avoided, the positions of the first barrier layer defining the position of the second plug opening and the second barrier layer are not mutually limited, and the process difficulty is facilitated to be reduced.

Description

Technical field [0001] The present invention relates to semiconductor technology, and particularly relates to a method of forming a semiconductor device. Background technique [0002] In order to follow the development of Morgan's law, and to meet people of various electronic products have a smaller size, taking up less space, more portable and operational requirements, semiconductor manufacturing technology is a high degree of integration, low power consumption, high performance as the goal of rapid development. The current semiconductor industry, the integrated circuit products can be divided into three types: digital circuitry, analog circuitry, digital-analog mixed circuit, wherein the memory is a very important type of digital circuits. In recent years, with the development of semiconductor technology, we have been developed in terms of memory random access memory and powerful data storage memory. A static random access memory (Static Random-Access Memory, SRAM) as represent...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8238
CPCH01L21/823878H01L21/823871H01L21/823821
Inventor 王楠
Owner SEMICON MFG INT (SHANGHAI) CORP
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