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Memory device and method of fabricating the same

A technology for storage elements and storage cells, which is used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc.

Pending Publication Date: 2021-10-01
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, 3D memory elements with vertical channel structures still face many challenges

Method used

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  • Memory device and method of fabricating the same
  • Memory device and method of fabricating the same
  • Memory device and method of fabricating the same

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Embodiment Construction

[0080] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in further detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0081] Please refer to Figure 1A , the memory element 10 of the embodiment of the present invention is a three-dimensional NOR flash memory element, which is disposed on the substrate 100 . The substrate 100 includes a plurality of blocks (Blocks) BLK separated by a plurality of insulation walls St. exist Figure 1A The multiple blocks (Block) BLK are represented by two blocks BLK0 and BLK1, but not limited thereto. The block BLK0 and the block BLK1 are separated by insulation walls (or insulation gaps) St0, St1, and St2. The memory element 10 includes a plurality of memory cell groups MCt located in the first region R1 of each block BLK. The first region R1 may also be called a memory cell region. A plurality of memo...

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Abstract

The invention discloses amemory device and a method of fabricating the same. The memory device includes: a first bit line located on a dielectric layer and a second bit line located over the dielectric layer; a first word line and a second word line located between the first bit line and the second bit line; a source line located between the first word line and the second word line; a channel pillar penetrating through the first word line and the source line and the second word line, and connected to the first bit line, the source line and the second bit line; and a charge storage structure including an upper portion surrounding an upper sidewall of the channel pillar and located between the second word line and the channel pillar and a lower portion surrounding a lower sidewall of the channel pillar and located between the first word line and the channel pillar.

Description

technical field [0001] The present invention relates to a memory element and its manufacturing method. Background technique [0002] As technology advances with each passing day, advances in electronic components have increased the need for greater storage capacity. In order to meet the requirement of high storage density, the size of the memory element becomes smaller and the integration level is higher. Therefore, the type of memory device has been developed from a 2D memory device with a planar gate structure to a 3D memory device with a vertical channel (VC) structure. However, 3D memory elements with vertical channel structures still face many challenges. Contents of the invention [0003] The invention provides a storage element and a manufacturing method thereof, which can have a plurality of vertically stacked storage units in a unit area to effectively utilize the area of ​​the substrate, and are compatible with existing processes. [0004] An embodiment of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11521H01L27/11551H01L27/11556H01L27/11568H01L27/11578H01L27/11582
CPCH10B41/20H10B41/30H10B43/20H10B41/27H10B43/30H10B43/27H10B43/10H10B43/50H01L29/40114H01L21/0217H01L21/31111H01L21/32134H01L21/0214H01L21/02164H01L21/02167H01L29/40117
Inventor 李智雄古绍泓
Owner MACRONIX INT CO LTD
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