A training method for high and low frequency serial image data

Abstract

A training method for high and low frequency serial image data, relating to a CMOS image data training method, which solves the problem that when the data rate of the existing serial image is lower than 200 Mbps, the transition edge of the serial image data cannot be detected; for high frequency clock , using Iserdes for serial-to-parallel conversion may encounter the problem of parallel data deviation of half a word. For low-frequency applications, use IDDR's double-edge sampling to broaden the sampling range of the sampling clock for serial image data and obtain the best sampling position. It is beneficial to avoid the influence of temperature drift. In the present invention, for high-frequency applications, Iserdes are used for serial-to-parallel conversion, and high-frequency clocks only drive io resources, which can be applied at higher frequencies. In the low-frequency parallel clock domain, the combination of parallel field data with different delay phases is used to overcome the half-word deviation of parallel numbers that occurs with temperature drift, ensuring stable and reliable training.

Description

technical field [0001] The invention relates to a training method for CMOS image data, in particular to a serial CMOS image data training method for low-frequency and high-frequency applications. Background technique [0002] CMOS detectors usually output image data in a serial mode, and in order to perform bit correction of the serial image data and find the best sampling position, an input-output delay unit (IODELAY) element is usually used. The reference clock of the IODELAY component is divided into two types, 200MHz and 300MHz; when the data rate of the serial image is higher than 200MHz, two jump edge positions must be detected when the data jump edge position is detected; and when the serial image When the data rate is lower than 200Mbps, there may be a jump edge of the serial image data that cannot be detected. For high-frequency clocks, serial-to-parallel conversion using a controllable serial-to-parallel converter (Ierdes) may encounter the situation that the para...

AI Technical Summary

Problems solved by technology

[0003] The present invention solves the problem that when the data rate of the existing serial image is lower than 200 Mbps, the transition edge of the serial image data cannot be detected; for the high-frequency clock, the parallel data deviation of half a word may be encountered by using Iserdes for the serial-to-parallel conversion situation, providing a training method for high and low frequency serial image data

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