Ocean and ionosphere integrated detection high-frequency radar system and control method thereof
A radar system and ionosphere technology, applied in radio wave measurement systems, measurement devices, radio wave reflection/reradiation, etc., can solve problems such as inability to work at the same time, high system complexity, and system performance deterioration
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Embodiment 1
[0081] The system structure of the present invention is as figure 1 As shown, it consists of a timing controller, an integrated signal generator, an ionospheric detection subsystem, a marine information detection subsystem and a display and control platform. The timing controller and integrated signal generator are the main contents of the present invention. The ionospheric detection subsystem and the marine information detection subsystem are respectively adapted based on the traditional ionospheric vertical survey instrument and high-frequency ground wave radar. The display and control platform It is an interface for user interaction and an essential part of the system.
[0082] The timing controller is mainly based on ARM and FPGA, and uses the GPIO interface of FPGA to generate multiple software-configurable timing control signals to provide synchronous timing for the integrated signal generator, ionospheric detection subsystem and ocean information detection subsystem res...
Embodiment 2
[0116] refer to figure 1 , the present invention includes a display and control platform, a timing controller, an integrated signal generator, an ionospheric detection subsystem and a marine information detection subsystem.
[0117] In this embodiment, the display and control platform is realized by a general-purpose computer, and is connected with each system through Ethernet for data interaction. The display and control platform is equipped with 4 displays, which are used to display system status and setting parameters, ionospheric detection results, ocean information detection results, and ocean-ionosphere information correlation analysis results.
[0118] Figure 4 It is a structural schematic diagram of the timing controller in this embodiment. The main control chip is ARM, which is connected to the display and control platform through Ethernet, receives control commands and system parameters, and outputs system status. ARM controls the FPGA to generate and output vario...
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