Partial bit stream read-back technology for testing internal resources of an FPGA

Abstract

The invention belongs to the field of FPGAs (Field Programmable Gate Array), and particularly relates to a partial bit stream read-back technology for testing internal resources of an FPGA (Field Programmable Gate Array), which can improve the defects of an existing FPGA internal resource testing method. The method comprises the following steps: firstly, resetting a test access interface controller, setting a read-back starting frame address, and starting bit stream read-back operation from the address; and then setting the length of the read-back data to be used for stipulating the total number of frames read from the start frame address to the completion of the read-back, and then setting the FPGA to be in a read-back state; after the setting is completed, enabling the last step to start reading data from the FPGA configuration register chain and store the data, so that the data can be used by an FPGA test platform based on a partial bit stream read-back technology. A partial bit stream read-back technology is adopted, so that the high efficiency of FPGA internal resource testing is ensured, the universality is higher, and the method can be transplanted to different series of FPGAs to be used for testing the FPGA internal resources.

Description

technical field [0001] The invention belongs to the FPGA testing technology, and in particular relates to a partial bit stream readback technology used for FPGA internal resource testing. Background technique [0002] FPGA (Field Programmable Gate Arrays), as an important member of digital circuits, is widely used in the design and production of integrated circuits with its rich logic resources, repeated programmability and rapid automatic development capabilities . However, with the continuous increase of FPGA integration, the internal structure becomes more complex, and the interconnection resource network required to achieve flexible programmability is also larger, and the failure rate of its internal resources also increases. Therefore, FPGA internal resource testing technology becomes more and more critical. [0003] Readback (Readback) is a method that can read the value in the chip's internal storage unit in the form of bit stream data, which is similar to the rever...

AI Technical Summary

Problems solved by technology

Among them, the traditional hardware testing method needs to complete the manual testing process many times, which is time-consuming and costly

Although the ATE-based test method speeds up the test process, the ATE test equipment is very expensive and has limited storage space, which will affect the complete FPGA test

Although the BIST-based test method reduces the test cost, but the BIST circuit is embedded in the FPGA, resulting in the need for multiple tests to complete the coverage of the entire FPGA internal resources, and the BIST circuit takes a lot of time to design, so the versatility is not strong

However, the test method based on readback has the disadvantages of long readback time and low overall test efficiency.

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