Level conversion circuit

Abstract

The invention provides a level conversion circuit. The level conversion circuit comprises a level conversion unit and a duty ratio unit, the level conversion unit comprises an input node, an output node, an adjusting input node and an adjusting output node, wherein the output node is used for outputting an output signal with a required level; the adjusting output node is used for adjusting the duty ratio of the output signal; the duty ratio unit is coupled between the adjusting input node and the adjusting output node; and the duty ratio unit is used for adjusting the duty ratio of the outputsignal. According to the level conversion circuit, the level conversion unit is used for outputting the output signal with the required level, and the duty ratio unit is coupled in the level conversion unit, so that the duty ratio of the output signal is effectively adjusted under the condition that the size ratio of the level conversion unit is not changed, and the quality of the output signal isfurther improved.

Description

【Technical field】 [0001] The invention relates to the technical field of integrated circuit chips, in particular to a level conversion circuit. 【Background technique】 [0002] In a semiconductor integrated circuit, the circuit signal is not very stable during the power-on or power-off process, especially when multiple power domains are used for power supply, the asynchronous power-on or power-off timing of each power domain is likely to cause the circuit signal Uncontrollable, this situation is especially obvious in the level conversion circuit, which directly leads to errors in the output signal of the level conversion circuit, and may cause a large leakage problem and damage related devices. [0003] The level conversion circuit includes a high-voltage level conversion circuit and a low-voltage level conversion circuit. The high-voltage level conversion circuit converts low-voltage signals into high-voltage signals, thereby realizing the control of low-voltage logic to hig...

AI Technical Summary

Problems solved by technology

Since the two high-voltage NMOS transistors work at low voltage, the pull-down capability of the two high-voltage NMOS transistors is very weak. When the low voltage value is low to a certain extent, the level conversion circuit cannot work, that is, the level conversion function cannot be realized. Moreover, the time difference between the rising edge and the falling edge of the converted signal is very different, which leads to an unreasonable duty cycle of the converted signal.

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