A high-speed semiconductor laser and its packaging structure and method

Abstract

The invention relates to a high-speed semiconductor laser and its packaging structure and method. The high-speed semiconductor laser packaging structure includes a semiconductor laser and a heat sink, and a P-type transition electrode is arranged on the heat sink. On sinking, the P-type electrode of the semiconductor laser faces downward, and is welded with the corresponding P-type transition electrode on the heat sink by solder, and the P-type transition electrode on the heat sink is electrically connected with the corresponding package pin on the tube base. The strip width of the active area is 1-5um, and the P-side electrode is very narrow, which greatly improves the speed. The P-side of the semiconductor laser does not need to be provided with gold wire lead pads, which can achieve the effect of improving heat dissipation and reducing parasitic capacitance, thereby improving laser performance. rate.

Description

technical field [0001] The invention belongs to the technical field of semiconductor lasers, and in particular relates to a high-speed semiconductor laser and its packaging structure and method. Background technique [0002] With the development of 5G technology and data centers, the modulation rate requirements for optical communication semiconductor lasers are getting higher and higher. The current 10G rate has been mass-produced and mature, and 25G rate lasers have also begun to be used on a large scale. In order to increase the laser modulation rate, one measure is to reduce the size of the laser chip, such as reducing the chip length and the width of the active region, but it will lead to problems such as difficult cleavage and serious heating of the laser; another measure is to optimize the quantum well design , such as increasing the amount of strain, etc., but it will lead to the occurrence of dislocations and defects, reducing the reliability of the device. On the ...

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Problems solved by technology

In order to increase the laser modulation rate, one measure is to reduce the size of the laser chip, such as reducing the chip length and the width of the active region, but it will lead to problems such as difficult cleavage and serious heating of the laser; another measure is to optimize the quantum well design , such as increasing the amount of strain, etc., but it will lead to the occurrence of dislocations and defects, reducing the reliability of the device

On the other hand, for high-speed semiconductor laser packaging, the industry generally adopts the method with the P-side electrode facing upwards. This method is simple and easy to implement, but the disadvantage is that it generates more serious heat, which will reduce the working speed of the laser.

At the same time, the P-side electrode gold wire lead needs to be added to the pad, which increases the parasitic capacitance. At the same time, the size of the pad is relatively small, and generally only one gold wire can be placed on the pad position, resulting in the introduction of a large parasitic inductance.

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